From patchwork Fri Jul 14 07:45:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Chen X-Patchwork-Id: 1807579 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4R2Nph3H9Vz20bt for ; Fri, 14 Jul 2023 17:46:52 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235160AbjGNHqv (ORCPT ); Fri, 14 Jul 2023 03:46:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235456AbjGNHqm (ORCPT ); Fri, 14 Jul 2023 03:46:42 -0400 Received: from mail.aspeedtech.com (mail.aspeedtech.com [211.20.114.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35AB93598; Fri, 14 Jul 2023 00:46:40 -0700 (PDT) Received: from TWMBX02.aspeed.com (192.168.0.24) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 14 Jul 2023 15:45:24 +0800 Received: from aspeedtech.com (192.168.10.13) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 14 Jul 2023 15:45:24 +0800 From: Ryan Chen To: , Brendan Higgins , Benjamin Herrenschmidt , Joel Stanley , Rob Herring , Krzysztof Kozlowski , Andrew Jeffery , Philipp Zabel , Wolfram Sang , "Andy Shevchenko" , , Florian Fainelli , Jean Delvare , William Zhang , Tyrone Ting , Tharun Kumar P , Ryan Chen , Conor Dooley , "Phil Edworthy" , , , , , <=linux-kernel@vger.kernel.org>, Andi Shyti CC: Krzysztof Kozlowski Subject: [PATCH v12 1/2] dt-bindings: i2c: aspeed: support for AST2600-i2cv2 Date: Fri, 14 Jul 2023 15:45:21 +0800 Message-ID: <20230714074522.23827-2-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230714074522.23827-1-ryan_chen@aspeedtech.com> References: <20230714074522.23827-1-ryan_chen@aspeedtech.com> MIME-Version: 1.0 Received-SPF: SoftFail (TWMBX02.aspeed.com: domain of transitioning ryan_chen@aspeedtech.com discourages use of 192.168.10.13 as permitted sender) X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma and description for ast2600-i2cv2. Signed-off-by: Ryan Chen Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/i2c/aspeed,i2c.yaml | 51 +++++++++++++++++-- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml index 6df27b47b922..6c16fc76c978 100644 --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml @@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs maintainers: - Rayn Chen -allOf: - - $ref: /schemas/i2c/i2c-controller.yaml# - properties: compatible: enum: @@ -49,12 +46,50 @@ properties: description: states that there is another master active on this bus + aspeed,enable-dma: + type: boolean + description: | + I2C bus enable dma mode transfer. + + ASPEED ast2600 platform equipped with 16 I2C controllers that share a + single DMA engine. DTS files can specify the data transfer mode to/from + the device, either DMA or programmed I/O. However, hardware limitations + may require a DTS to manually allocate which controller can use DMA mode. + The "aspeed,enable-dma" property allows control of this. + + In cases where one the hardware design results in a specific + controller handling a larger amount of data, a DTS would likely + enable DMA mode for that one controller. + + aspeed,global-regs: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of i2c global register node. + required: - reg - compatible - clocks - resets +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + - if: + properties: + compatible: + contains: + const: aspeed,ast2600-i2cv2 + + then: + properties: + reg: + minItems: 2 + required: + - aspeed,global-regs + else: + properties: + aspeed,global-regs: false + aspeed,enable-dma: false + unevaluatedProperties: false examples: @@ -71,3 +106,13 @@ examples: interrupts = <0>; interrupt-parent = <&i2c_ic>; }; + - | + #include + i2c1: i2c@80 { + compatible = "aspeed,ast2600-i2cv2"; + reg = <0x80 0x80>, <0xc00 0x20>; + aspeed,global-regs = <&i2c_global>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_I2C>; + interrupts = ; + };