| Message ID | 20221109002449.35936-3-marex@denx.de |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v5,1/3] dt-bindings: imx6q-pcie: Handle various clock configurations | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 09/11/2022 01:24, Marek Vasut wrote: > The i.MX6 and i.MX7D does not use block controller to toggle PCIe > reset, hence the PCIe DT description contains three reset entries > on these older SoCs. Add this exception into the binding document. > > Signed-off-by: Marek Vasut <marex@denx.de> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 11/9/22 09:45, Krzysztof Kozlowski wrote: > On 09/11/2022 01:24, Marek Vasut wrote: >> The i.MX6 and i.MX7D does not use block controller to toggle PCIe >> reset, hence the PCIe DT description contains three reset entries >> on these older SoCs. Add this exception into the binding document. >> >> Signed-off-by: Marek Vasut <marex@denx.de> >> --- > > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Are there still any open topics regarding this series ?
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index b14c12a47cc1c..b6c2c87d00712 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -84,15 +84,14 @@ properties: - const: pcie_phy resets: + minItems: 2 maxItems: 3 description: Phandles to PCIe-related reset lines exposed by SRC IP block. Additional required by imx7d-pcie and imx8mq-pcie. reset-names: - items: - - const: pciephy - - const: apps - - const: turnoff + minItems: 2 + maxItems: 3 fsl,tx-deemph-gen1: description: Gen1 De-emphasis value (optional required). @@ -283,6 +282,34 @@ allOf: maxItems: 1 power-domain-names: false + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6sx-pcie + - fsl,imx6qp-pcie + - fsl,imx7d-pcie + - fsl,imx8mq-pcie + then: + properties: + resets: + minItems: 3 + reset-names: + items: + - const: pciephy + - const: apps + - const: turnoff + else: + properties: + resets: + maxItems: 2 + reset-names: + items: + - const: apps + - const: turnoff + examples: - | #include <dt-bindings/clock/imx6qdl-clock.h>
The i.MX6 and i.MX7D does not use block controller to toggle PCIe reset, hence the PCIe DT description contains three reset entries on these older SoCs. Add this exception into the binding document. Signed-off-by: Marek Vasut <marex@denx.de> --- Cc: Fabio Estevam <festevam@gmail.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team <linux-imx@nxp.com> To: devicetree@vger.kernel.org --- V2: - Add mx8mq to 3-reset PCIe core variant - Handle the resets in allOf section V3: - Reinstate reset: maxItems:3 and add minItems:2 - Move reset-names back to main section - The validation no longer works and introduces errors like these: arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb: pcie@33800000: reset-names:0: 'pciephy' was expected V4: - Reinstate reset minItems and maxItems - Turn the first two reset-names items into enums to cover all the various name combinations, sort the rest in allOf section V5: - Drop items from main section reset-names and add maxItems:3 --- .../bindings/pci/fsl,imx6q-pcie.yaml | 35 ++++++++++++++++--- 1 file changed, 31 insertions(+), 4 deletions(-)