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[v4,1/2] dt-bindings: mfd: stm32-timers: Document how to specify interrupts

Message ID 20220519162838.695404-1-u.kleine-koenig@pengutronix.de
State Not Applicable, archived
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Series [v4,1/2] dt-bindings: mfd: stm32-timers: Document how to specify interrupts | expand

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Commit Message

Uwe Kleine-König May 19, 2022, 4:28 p.m. UTC 
The timer units in the stm32mp1 CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Document how
to formalize these in a device tree.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
Changes since v3:
  - Do the things Rob suggested in reqly to v1 which I didn't notice
    until Fabrice told me in reply to v3.

 .../devicetree/bindings/mfd/st,stm32-timers.yaml  | 15 +++++++++++++++
 1 file changed, 15 insertions(+)


base-commit: 3123109284176b1532874591f7c81f3837bbdc17

Comments

Fabrice Gasnier May 20, 2022, 1:37 p.m. UTC | #1 
On 5/19/22 18:28, Uwe Kleine-König wrote:
> The timer units in the stm32mp1 CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Document how
> to formalize these in a device tree.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Hi Uwe,

You can add my:
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

Best Regards,
Thanks
Fabrice

> ---
> Changes since v3:
>   - Do the things Rob suggested in reqly to v1 which I didn't notice
>     until Fabrice told me in reply to v3.
> 
>  .../devicetree/bindings/mfd/st,stm32-timers.yaml  | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
> index 10b330d42901..5b05b2ec1728 100644
> --- a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
> +++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
> @@ -46,6 +46,21 @@ properties:
>      minItems: 1
>      maxItems: 7
>  
> +  interrupts:
> +    oneOf:
> +      - maxItems: 1
> +      - maxItems: 4
> +
> +  interrupt-names:
> +    oneOf:
> +      - items:
> +          - const: global
> +      - items:
> +          - const: brk
> +          - const: up
> +          - const: trg-com
> +          - const: cc
> +
>    "#address-cells":
>      const: 1
>  
> 
> base-commit: 3123109284176b1532874591f7c81f3837bbdc17
Fabrice Gasnier May 20, 2022, 1:37 p.m. UTC | #2 
On 5/19/22 18:28, Uwe Kleine-König wrote:
> The timer units in the stm32mp15x CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Add the irqs
> to the timer units on stm32mp15x.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Hi Uwe,

You can add my:
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

Best Regards,
Thanks
Fabrice

> ---
>  arch/arm/boot/dts/stm32mp151.dtsi | 34 +++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
> index f9aa9af31efd..ae290a04771a 100644
> --- a/arch/arm/boot/dts/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/stm32mp151.dtsi
> @@ -127,6 +127,8 @@ timers2: timer@40000000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40000000 0x400>;
> +			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM2_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 18 0x400 0x1>,
> @@ -160,6 +162,8 @@ timers3: timer@40001000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40001000 0x400>;
> +			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM3_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 23 0x400 0x1>,
> @@ -194,6 +198,8 @@ timers4: timer@40002000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40002000 0x400>;
> +			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM4_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 29 0x400 0x1>,
> @@ -226,6 +232,8 @@ timers5: timer@40003000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40003000 0x400>;
> +			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM5_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 55 0x400 0x1>,
> @@ -260,6 +268,8 @@ timers6: timer@40004000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40004000 0x400>;
> +			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM6_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 69 0x400 0x1>;
> @@ -278,6 +288,8 @@ timers7: timer@40005000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40005000 0x400>;
> +			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM7_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 70 0x400 0x1>;
> @@ -296,6 +308,8 @@ timers12: timer@40006000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40006000 0x400>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM12_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -318,6 +332,8 @@ timers13: timer@40007000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40007000 0x400>;
> +			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM13_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -340,6 +356,8 @@ timers14: timer@40008000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x40008000 0x400>;
> +			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM14_K>;
>  			clock-names = "int";
>  			status = "disabled";
> @@ -623,6 +641,11 @@ timers1: timer@44000000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44000000 0x400>;
> +			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "brk", "up", "trg-com", "cc";
>  			clocks = <&rcc TIM1_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 11 0x400 0x1>,
> @@ -659,6 +682,11 @@ timers8: timer@44001000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44001000 0x400>;
> +			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "brk", "up", "trg-com", "cc";
>  			clocks = <&rcc TIM8_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 47 0x400 0x1>,
> @@ -746,6 +774,8 @@ timers15: timer@44006000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44006000 0x400>;
> +			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM15_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 105 0x400 0x1>,
> @@ -773,6 +803,8 @@ timers16: timer@44007000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44007000 0x400>;
> +			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM16_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 109 0x400 0x1>,
> @@ -797,6 +829,8 @@ timers17: timer@44008000 {
>  			#size-cells = <0>;
>  			compatible = "st,stm32-timers";
>  			reg = <0x44008000 0x400>;
> +			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "global";
>  			clocks = <&rcc TIM17_K>;
>  			clock-names = "int";
>  			dmas = <&dmamux1 111 0x400 0x1>,
Rob Herring (Arm) June 1, 2022, 9:11 p.m. UTC | #3 
On Thu, 19 May 2022 18:28:37 +0200, Uwe Kleine-König wrote:
> The timer units in the stm32mp1 CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Document how
> to formalize these in a device tree.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Changes since v3:
>   - Do the things Rob suggested in reqly to v1 which I didn't notice
>     until Fabrice told me in reply to v3.
> 
>  .../devicetree/bindings/mfd/st,stm32-timers.yaml  | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Lee Jones June 15, 2022, 10:01 p.m. UTC | #4 
On Thu, 19 May 2022, Uwe Kleine-König wrote:

> The timer units in the stm32mp1 CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Document how
> to formalize these in a device tree.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> Changes since v3:
>   - Do the things Rob suggested in reqly to v1 which I didn't notice
>     until Fabrice told me in reply to v3.
> 
>  .../devicetree/bindings/mfd/st,stm32-timers.yaml  | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)

Applied, thanks.
Uwe Kleine-König July 20, 2022, 7:18 a.m. UTC | #5 
Hello,

On Thu, May 19, 2022 at 06:28:38PM +0200, Uwe Kleine-König wrote:
> The timer units in the stm32mp15x CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Add the irqs
> to the timer units on stm32mp15x.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

This patch wasn't picked up yet (at least nobody told to have done it
and it's not in next). Is there a problem other than no maintainer time?

Best regards
Uwe
Alexandre TORGUE Aug. 1, 2022, 8:44 a.m. UTC | #6 
Hi Uwe

On 7/20/22 09:18, Uwe Kleine-König wrote:
> Hello,
> 
> On Thu, May 19, 2022 at 06:28:38PM +0200, Uwe Kleine-König wrote:
>> The timer units in the stm32mp15x CPUs have interrupts, depending on the
>> timer flavour either one "global" or four dedicated ones. Add the irqs
>> to the timer units on stm32mp15x.
>>
>> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> 
> This patch wasn't picked up yet (at least nobody told to have done it
> and it's not in next). Is there a problem other than no maintainer time?
> 
> Best regards
> Uwe
> 

I was waiting for a review from Rob or Krzysztof on bindings patch [1]. 
Let me know if I missed it.

Alex
Uwe Kleine-König Aug. 1, 2022, 9:53 a.m. UTC | #7 
On Mon, Aug 01, 2022 at 10:44:28AM +0200, Alexandre TORGUE wrote:
> Hi Uwe
> 
> On 7/20/22 09:18, Uwe Kleine-König wrote:
> > Hello,
> > 
> > On Thu, May 19, 2022 at 06:28:38PM +0200, Uwe Kleine-König wrote:
> > > The timer units in the stm32mp15x CPUs have interrupts, depending on the
> > > timer flavour either one "global" or four dedicated ones. Add the irqs
> > > to the timer units on stm32mp15x.
> > > 
> > > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> > 
> > This patch wasn't picked up yet (at least nobody told to have done it
> > and it's not in next). Is there a problem other than no maintainer time?
> > 
> > Best regards
> > Uwe
> > 
> 
> I was waiting for a review from Rob or Krzysztof on bindings patch [1]. Let
> me know if I missed it.

You did:

Patch #1 was reviewed by Rob and taken by Lee, currently waiting in
'for-mfd-next' of
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git as
9875ab53c8ae ("dt-bindings: mfd: stm32-timers: Document how to specify
interrupts").

Best regards
Uwe
Alexandre TORGUE Aug. 1, 2022, 1:28 p.m. UTC | #8 
On 8/1/22 11:53, Uwe Kleine-König wrote:
> On Mon, Aug 01, 2022 at 10:44:28AM +0200, Alexandre TORGUE wrote:
>> Hi Uwe
>>
>> On 7/20/22 09:18, Uwe Kleine-König wrote:
>>> Hello,
>>>
>>> On Thu, May 19, 2022 at 06:28:38PM +0200, Uwe Kleine-König wrote:
>>>> The timer units in the stm32mp15x CPUs have interrupts, depending on the
>>>> timer flavour either one "global" or four dedicated ones. Add the irqs
>>>> to the timer units on stm32mp15x.
>>>>
>>>> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
>>>
>>> This patch wasn't picked up yet (at least nobody told to have done it
>>> and it's not in next). Is there a problem other than no maintainer time?
>>>
>>> Best regards
>>> Uwe
>>>
>>
>> I was waiting for a review from Rob or Krzysztof on bindings patch [1]. Let
>> me know if I missed it.
> 
> You did:
> 
> Patch #1 was reviewed by Rob and taken by Lee, currently waiting in
> 'for-mfd-next' of
> git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git as
> 9875ab53c8ae ("dt-bindings: mfd: stm32-timers: Document how to specify
> interrupts").

Ok, my mistake. I'll apply it for v5.21.

Cheers
Alex

> 
> Best regards
> Uwe
>
Alexandre TORGUE Aug. 26, 2022, 8:17 a.m. UTC | #9 
Hi Uwe

On 5/19/22 18:28, Uwe Kleine-König wrote:
> The timer units in the stm32mp15x CPUs have interrupts, depending on the
> timer flavour either one "global" or four dedicated ones. Add the irqs
> to the timer units on stm32mp15x.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>   arch/arm/boot/dts/stm32mp151.dtsi | 34 +++++++++++++++++++++++++++++++
>   1 file changed, 34 insertions(+)
> 

Sorry for the delays.

Applied on stm32-next.

Thanks.
Alex
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
index 10b330d42901..5b05b2ec1728 100644
--- a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
+++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
@@ -46,6 +46,21 @@  properties:
     minItems: 1
     maxItems: 7
 
+  interrupts:
+    oneOf:
+      - maxItems: 1
+      - maxItems: 4
+
+  interrupt-names:
+    oneOf:
+      - items:
+          - const: global
+      - items:
+          - const: brk
+          - const: up
+          - const: trg-com
+          - const: cc
+
   "#address-cells":
     const: 1