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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id p23sm2898595edx.86.2022.01.21.13.03.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:03:51 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Philipp Zabel , Taniya Das , Ansuel Smith , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/15] dt-bindings: clock: split qcom,gcc.yaml to common and specific schema Date: Fri, 21 Jan 2022 22:03:26 +0100 Message-Id: <20220121210340.32362-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220121210340.32362-1-ansuelsmth@gmail.com> References: <20220121210340.32362-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Split qcom,gcc.yaml to common and specific schema to use it as a template for schema that needs to use the gcc bindings and require to add additional bindings. Signed-off-by: Ansuel Smith --- .../bindings/clock/qcom,gcc-common.yaml | 42 +++++++++++++++++++ .../devicetree/bindings/clock/qcom,gcc.yaml | 25 ++--------- 2 files changed, 46 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml new file mode 100644 index 000000000000..ea1dd94d8bf1 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding Common Bindings + +maintainers: + - Stephen Boyd + - Taniya Das + +description: | + Common bindings for Qualcomm global clock control module which supports + the clocks, resets and power domains. + +properties: + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + protected-clocks: + description: + Protected clock specifier list as per common clock binding. + +required: + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml index f66d703bd913..73e3ff4979c6 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml @@ -34,6 +34,9 @@ description: | - dt-bindings/reset/qcom,gcc-mdm9615.h - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660) +allOf: + - $ref: "qcom,gcc-common.yaml#" + properties: compatible: enum: @@ -55,30 +58,10 @@ properties: - qcom,gcc-sdm630 - qcom,gcc-sdm660 - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - - protected-clocks: - description: - Protected clock specifier list as per common clock binding. - required: - compatible - - reg - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' -additionalProperties: false +unevaluatedProperties: false examples: # Example for GCC for MSM8960: