diff mbox series

[v3,1/6] dt-bindings: gpio: tegra: Convert to json-schema

Message ID 20211208173047.558108-1-thierry.reding@gmail.com
State Not Applicable, archived
Headers show
Series [v3,1/6] dt-bindings: gpio: tegra: Convert to json-schema | expand

Checks

Context Check Description
robh/checkpatch warning total: 0 errors, 2 warnings, 111 lines checked
robh/dtbs-check warning build log
robh/dt-meta-schema success

Commit Message

Thierry Reding Dec. 8, 2021, 5:30 p.m. UTC
From: Thierry Reding <treding@nvidia.com>

Convert the NVIDIA Tegra GPIO controller device tree bindings from
free-form text format to json-schema.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v3:
- replace unevaluatedProperties with additionalProperties

Changes in v2:
- move GPIO hog definitions into unevaluatedProperties subschema
- remove redundant description of standard properties

 .../bindings/gpio/nvidia,tegra20-gpio.txt     |  40 -------
 .../bindings/gpio/nvidia,tegra20-gpio.yaml    | 111 ++++++++++++++++++
 2 files changed, 111 insertions(+), 40 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
 create mode 100644 Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml

Comments

Rob Herring Dec. 8, 2021, 7:01 p.m. UTC | #1
On Wed, Dec 08, 2021 at 06:30:42PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Convert the NVIDIA Tegra GPIO controller device tree bindings from
> free-form text format to json-schema.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v3:
> - replace unevaluatedProperties with additionalProperties
> 
> Changes in v2:
> - move GPIO hog definitions into unevaluatedProperties subschema
> - remove redundant description of standard properties
> 
>  .../bindings/gpio/nvidia,tegra20-gpio.txt     |  40 -------
>  .../bindings/gpio/nvidia,tegra20-gpio.yaml    | 111 ++++++++++++++++++
>  2 files changed, 111 insertions(+), 40 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
>  create mode 100644 Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml
> 
> diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
> deleted file mode 100644
> index 023c9526e5f8..000000000000
> --- a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -NVIDIA Tegra GPIO controller
> -
> -Required properties:
> -- compatible : "nvidia,tegra<chip>-gpio"
> -- reg : Physical base address and length of the controller's registers.
> -- interrupts : The interrupt outputs from the controller. For Tegra20,
> -  there should be 7 interrupts specified, and for Tegra30, there should
> -  be 8 interrupts specified.
> -- #gpio-cells : Should be two. The first cell is the pin number and the
> -  second cell is used to specify optional parameters:
> -  - bit 0 specifies polarity (0 for normal, 1 for inverted)
> -- gpio-controller : Marks the device node as a GPIO controller.
> -- #interrupt-cells : Should be 2.
> -  The first cell is the GPIO number.
> -  The second cell is used to specify flags:
> -    bits[3:0] trigger type and level flags:
> -      1 = low-to-high edge triggered.
> -      2 = high-to-low edge triggered.
> -      4 = active high level-sensitive.
> -      8 = active low level-sensitive.
> -      Valid combinations are 1, 2, 3, 4, 8.
> -- interrupt-controller : Marks the device node as an interrupt controller.
> -
> -Example:
> -
> -gpio: gpio@6000d000 {
> -	compatible = "nvidia,tegra20-gpio";
> -	reg = < 0x6000d000 0x1000 >;
> -	interrupts = < 0 32 0x04
> -		       0 33 0x04
> -		       0 34 0x04
> -		       0 35 0x04
> -		       0 55 0x04
> -		       0 87 0x04
> -		       0 89 0x04 >;
> -	#gpio-cells = <2>;
> -	gpio-controller;
> -	#interrupt-cells = <2>;
> -	interrupt-controller;
> -};
> diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml
> new file mode 100644
> index 000000000000..dd5d29add699
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml
> @@ -0,0 +1,111 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
> +
> +maintainers:
> +  - Thierry Reding <thierry.reding@gmail.com>
> +  - Jon Hunter <jonathanh@nvidia.com>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - nvidia,tegra20-gpio
> +          - nvidia,tegra30-gpio
> +
> +      - items:
> +          - enum:
> +              - nvidia,tegra114-gpio
> +              - nvidia,tegra124-gpio
> +              - nvidia,tegra210-gpio
> +          - const: nvidia,tegra30-gpio
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    description: The interrupt outputs from the controller. For Tegra20,
> +      there should be 7 interrupts specified, and for Tegra30, there should
> +      be 8 interrupts specified.
> +
> +  "#gpio-cells":
> +    description: The first cell is the pin number and the second cell is used
> +      to specify the GPIO polarity (0 = active high, 1 = active low).
> +    $ref: "/schemas/types.yaml#/definitions/uint32"

Don't need a type here.

With that,

Reviewed-by: Rob Herring <robh@kernel.org>
Linus Walleij Dec. 10, 2021, 1:47 a.m. UTC | #2
On Wed, Dec 8, 2021 at 6:30 PM Thierry Reding <thierry.reding@gmail.com> wrote:

> From: Thierry Reding <treding@nvidia.com>
>
> Convert the NVIDIA Tegra GPIO controller device tree bindings from
> free-form text format to json-schema.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
deleted file mode 100644
index 023c9526e5f8..000000000000
--- a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
+++ /dev/null
@@ -1,40 +0,0 @@ 
-NVIDIA Tegra GPIO controller
-
-Required properties:
-- compatible : "nvidia,tegra<chip>-gpio"
-- reg : Physical base address and length of the controller's registers.
-- interrupts : The interrupt outputs from the controller. For Tegra20,
-  there should be 7 interrupts specified, and for Tegra30, there should
-  be 8 interrupts specified.
-- #gpio-cells : Should be two. The first cell is the pin number and the
-  second cell is used to specify optional parameters:
-  - bit 0 specifies polarity (0 for normal, 1 for inverted)
-- gpio-controller : Marks the device node as a GPIO controller.
-- #interrupt-cells : Should be 2.
-  The first cell is the GPIO number.
-  The second cell is used to specify flags:
-    bits[3:0] trigger type and level flags:
-      1 = low-to-high edge triggered.
-      2 = high-to-low edge triggered.
-      4 = active high level-sensitive.
-      8 = active low level-sensitive.
-      Valid combinations are 1, 2, 3, 4, 8.
-- interrupt-controller : Marks the device node as an interrupt controller.
-
-Example:
-
-gpio: gpio@6000d000 {
-	compatible = "nvidia,tegra20-gpio";
-	reg = < 0x6000d000 0x1000 >;
-	interrupts = < 0 32 0x04
-		       0 33 0x04
-		       0 34 0x04
-		       0 35 0x04
-		       0 55 0x04
-		       0 87 0x04
-		       0 89 0x04 >;
-	#gpio-cells = <2>;
-	gpio-controller;
-	#interrupt-cells = <2>;
-	interrupt-controller;
-};
diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml
new file mode 100644
index 000000000000..dd5d29add699
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.yaml
@@ -0,0 +1,111 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
+
+maintainers:
+  - Thierry Reding <thierry.reding@gmail.com>
+  - Jon Hunter <jonathanh@nvidia.com>
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - nvidia,tegra20-gpio
+          - nvidia,tegra30-gpio
+
+      - items:
+          - enum:
+              - nvidia,tegra114-gpio
+              - nvidia,tegra124-gpio
+              - nvidia,tegra210-gpio
+          - const: nvidia,tegra30-gpio
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    description: The interrupt outputs from the controller. For Tegra20,
+      there should be 7 interrupts specified, and for Tegra30, there should
+      be 8 interrupts specified.
+
+  "#gpio-cells":
+    description: The first cell is the pin number and the second cell is used
+      to specify the GPIO polarity (0 = active high, 1 = active low).
+    $ref: "/schemas/types.yaml#/definitions/uint32"
+    const: 2
+
+  gpio-controller: true
+
+  gpio-ranges:
+    maxItems: 1
+
+  "#interrupt-cells":
+    description: |
+      Should be 2. The first cell is the GPIO number. The second cell is
+      used to specify flags:
+
+        bits[3:0] trigger type and level flags:
+          1 = low-to-high edge triggered.
+          2 = high-to-low edge triggered.
+          4 = active high level-sensitive.
+          8 = active low level-sensitive.
+
+      Valid combinations are 1, 2, 3, 4, 8.
+    const: 2
+
+  interrupt-controller: true
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nvidia,tegra30-gpio
+    then:
+      properties:
+        interrupts:
+          minItems: 8
+          maxItems: 8
+    else:
+      properties:
+        interrupts:
+          minItems: 7
+          maxItems: 7
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - "#gpio-cells"
+  - gpio-controller
+  - "#interrupt-cells"
+  - interrupt-controller
+
+additionalProperties:
+  type: object
+  required:
+    - gpio-hog
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    gpio: gpio@6000d000 {
+        compatible = "nvidia,tegra20-gpio";
+        reg = <0x6000d000 0x1000>;
+        interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+        #gpio-cells = <2>;
+        gpio-controller;
+        #interrupt-cells = <2>;
+        interrupt-controller;
+    };