| Message ID | 20211110222200.6780-3-leoyang.li@nxp.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | lx216x DTS updates | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
On Wed, Nov 10, 2021 at 04:21:51PM -0600, Li Yang wrote: > The compatbile string is already in use, fix the chip list in binding to same typo. > include it. > > Signed-off-by: Li Yang <leoyang.li@nxp.com> > --- > .../devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org>
> -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: Monday, November 29, 2021 2:54 PM > To: Leo Li <leoyang.li@nxp.com> > Cc: Shawn Guo <shawnguo@kernel.org>; Michael Turquette > <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > kernel@lists.infradead.org > Subject: Re: [PATCH 02/11] dt-bindings: fsl,layerscape-dcfg: add missing > compatible for lx2160a > > On Wed, Nov 10, 2021 at 04:21:51PM -0600, Li Yang wrote: > > The compatbile string is already in use, fix the chip list in binding to > > same typo. > > > include it. > > > > Signed-off-by: Li Yang <leoyang.li@nxp.com> > > --- > > .../devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > Acked-by: Rob Herring <robh@kernel.org> Thanks. Both typo fixed and applied to fsl-soc tree. Regards, Leo
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt index b5cb374dc47d..10a91cc8b997 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt @@ -8,7 +8,7 @@ Required properties: - compatible: Should contain a chip-specific compatible string, Chip-specific strings are of the form "fsl,<chip>-dcfg", The following <chip>s are known to be supported: - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a - reg : should contain base address and length of DCFG memory-mapped registers
The compatbile string is already in use, fix the chip list in binding to include it. Signed-off-by: Li Yang <leoyang.li@nxp.com> --- .../devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)