Message ID | 20211022101856.8612-2-peng.fan@oss.nxp.com |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | mailbox: imx: support i.MX8ULP S400 MU | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success | |
robh/dt-meta-schema | success | |
robh/dtbs-check | success |
On Fri, 22 Oct 2021 18:18:55 +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Similar to i.MX8QM/QXP SCU, i.MX8ULP SCU MU is dedicated for > communication between S400 and Cortex-A cores from hardware design, > it could not be reused for other purpose. To use S400 MU more > effectivly, add "fsl,imx8ulp-mu-s4" compatile to support fast IPC. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 675ad9de15bb..a337bcd80c4a 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -28,6 +28,7 @@ properties: - const: fsl,imx7ulp-mu - const: fsl,imx8ulp-mu - const: fsl,imx8-mu-scu + - const: fsl,imx8ulp-mu-s4 - items: - enum: - fsl,imx7s-mu