| Message ID | 20210421042834.27309-2-samuel@sholland.org |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Allwinner H6 USB3 device tree updates | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | fail | build log |
On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote: > The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the > USB3 PHY. This suggests the reset line controls the USB3 IP as a whole. > Represent this by attaching the reset line to a glue layer device. > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++ > 1 file changed, 75 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml: $id: 'http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3#' does not match 'http://devicetree.org/schemas/.*\\.yaml#' Unknown file referenced: [Errno 2] No such file or directory: '/usr/local/lib/python3.8/dist-packages/dtschema/schemas/usb/allwinner,sun50i-h6-usb3-phy.yaml' xargs: dt-doc-validate: exited with status 255; aborting /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml: ignoring, error in schema: $id warning: no schema found in file: ./Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dts:23.27-50.11: Warning (unit_address_vs_reg): /example-0/usb@5200000: node has a unit name, but no reg or ranges property Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml:0:0: /example-0/usb@5200000: failed to match any schema with compatible: ['allwinner,sun50i-h6-dwc3'] /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.example.dt.yaml: usb@5200000: phy-names:0: 'usb2-phy' was expected From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/usb/snps,dwc3.yaml See https://patchwork.ozlabs.org/patch/1468558 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Wed, Apr 21, 2021 at 07:51:48AM -0500, Rob Herring wrote: > On Tue, 20 Apr 2021 23:28:33 -0500, Samuel Holland wrote: > > The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the > > USB3 PHY. This suggests the reset line controls the USB3 IP as a whole. > > Represent this by attaching the reset line to a glue layer device. > > > > Signed-off-by: Samuel Holland <samuel@sholland.org> > > --- > > .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++ > > 1 file changed, 75 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): I dropped these patches then Maxime
diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml new file mode 100644 index 000000000000..86efd6d21ab4 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/allwinner,sun50i-h6-dwc3# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner H6 DWC3 USB controller + +maintainers: + - Chen-Yu Tsai <wens@csie.org> + - Maxime Ripard <mripard@kernel.org> + +properties: + compatible: + const: allwinner,sun50i-h6-dwc3 + + "#address-cells": true + + "#size-cells": true + + ranges: true + + resets: + maxItems: 1 + +# Required child node: + +patternProperties: + "^phy@[0-9a-f]+$": + $ref: allwinner,sun50i-h6-usb3-phy.yaml# + + "^usb@[0-9a-f]+$": + $ref: snps,dwc3.yaml# + +required: + - compatible + - ranges + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/sun50i-h6-ccu.h> + #include <dt-bindings/reset/sun50i-h6-ccu.h> + + usb3: usb@5200000 { + compatible = "allwinner,sun50i-h6-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + resets = <&ccu RST_BUS_XHCI>; + + dwc3: usb@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_XHCI>, + <&ccu CLK_BUS_XHCI>, + <&rtc 0>; + clock-names = "ref", "bus_early", "suspend"; + dr_mode = "host"; + phys = <&usb3phy>; + phy-names = "usb3-phy"; + }; + + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + }; + };
The RST_BUS_XHCI reset line in the H6 affects both the DWC3 core and the USB3 PHY. This suggests the reset line controls the USB3 IP as a whole. Represent this by attaching the reset line to a glue layer device. Signed-off-by: Samuel Holland <samuel@sholland.org> --- .../usb/allwinner,sun50i-h6-dwc3.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/allwinner,sun50i-h6-dwc3.yaml