| Message ID | 20210303093950.20309-1-vic.wu@mediatek.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | crypto: mediatek - remove obsolete documentation | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 2 warnings, 19 lines checked |
On Wed, Mar 03, 2021 at 05:39:50PM +0800, Vic Wu wrote: > The crypto mediatek driver has been replaced by the inside-secure driver now. > Remove DT bindings documentation and update crypto engine nodes to the mt7623.dtsi files. Wrap lines. > > Signed-off-by: Vic Wu <vic.wu@mediatek.com> > Acked-by: Ryder Lee <ryder.lee@mediatek.com> > --- > Documentation/devicetree/bindings/crypto/mediatek-crypto.txt | 25 ------------------- > arch/arm/boot/dts/mt7623.dtsi | 8 +++--- > 2 files changed, 3 insertions(+), 30 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/crypto/mediatek-crypto.txt > > diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt > deleted file mode 100644 > index 450da3661cad..000000000000 > --- a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt > +++ /dev/null > @@ -1,25 +0,0 @@ > -MediaTek cryptographic accelerators > - > -Required properties: > -- compatible: Should be "mediatek,eip97-crypto" > -- reg: Address and length of the register set for the device > -- interrupts: Should contain the five crypto engines interrupts in numeric > - order. These are global system and four descriptor rings. > -- clocks: the clock used by the core > -- clock-names: Must contain "cryp". > -- power-domains: Must contain a reference to the PM domain. > - > - > -Example: > - crypto: crypto@1b240000 { > - compatible = "mediatek,eip97-crypto"; > - reg = <0 0x1b240000 0 0x20000>; > - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, > - <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, > - <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, > - <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, > - <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; > - clocks = <ðsys CLK_ETHSYS_CRYPTO>; > - clock-names = "cryp"; > - power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; > - }; > diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi > index aea6809500d7..25e3f3b04123 100644 > --- a/arch/arm/boot/dts/mt7623.dtsi > +++ b/arch/arm/boot/dts/mt7623.dtsi > @@ -949,16 +949,14 @@ > }; > > crypto: crypto@1b240000 { > - compatible = "mediatek,eip97-crypto"; > + compatible = "inside-secure,safexcel-eip97"; Please read what the new binding says about this compatible string. > reg = <0 0x1b240000 0 0x20000>; > interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, > <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, > <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, > - <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, > - <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; > + <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; Where did the extra interrupt go? > + interrupt-names = "ring0", "ring1", "ring2", "ring3"; > clocks = <ðsys CLK_ETHSYS_CRYPTO>; > - clock-names = "cryp"; > - power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; Suddenly the h/w is not in a power domain? Seems to me 'mediatek,eip97-crypto' should be added to the common driver without having a dts change. Rob
diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt deleted file mode 100644 index 450da3661cad..000000000000 --- a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt +++ /dev/null @@ -1,25 +0,0 @@ -MediaTek cryptographic accelerators - -Required properties: -- compatible: Should be "mediatek,eip97-crypto" -- reg: Address and length of the register set for the device -- interrupts: Should contain the five crypto engines interrupts in numeric - order. These are global system and four descriptor rings. -- clocks: the clock used by the core -- clock-names: Must contain "cryp". -- power-domains: Must contain a reference to the PM domain. - - -Example: - crypto: crypto@1b240000 { - compatible = "mediatek,eip97-crypto"; - reg = <0 0x1b240000 0 0x20000>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; - clocks = <ðsys CLK_ETHSYS_CRYPTO>; - clock-names = "cryp"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; - }; diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index aea6809500d7..25e3f3b04123 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -949,16 +949,14 @@ }; crypto: crypto@1b240000 { - compatible = "mediatek,eip97-crypto"; + compatible = "inside-secure,safexcel-eip97"; reg = <0 0x1b240000 0 0x20000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, - <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; + <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "ring0", "ring1", "ring2", "ring3"; clocks = <ðsys CLK_ETHSYS_CRYPTO>; - clock-names = "cryp"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; status = "disabled"; };