| Message ID | 20210302131558.19375-1-devik@eaxlabs.cz |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [v3,1/2] dt-bindings: serial: Add rx-tx-swap to stm32-usart | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | fail | build log |
On 3/2/21 2:15 PM, Martin Devera wrote: > STM32 F7/H7 usarts supports RX & TX pin swapping. > Add option to turn it on. > Tested on STM32MP157. > > Signed-off-by: Martin Devera <devik@eaxlabs.cz> > --- > drivers/tty/serial/stm32-usart.c | 11 ++++++++++- > drivers/tty/serial/stm32-usart.h | 5 +++++ > 2 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c > index b3675cf25a69..d390f7da1441 100644 > --- a/drivers/tty/serial/stm32-usart.c > +++ b/drivers/tty/serial/stm32-usart.c > @@ -644,6 +644,12 @@ static int stm32_usart_startup(struct uart_port *port) > if (ret) > return ret; > > + if (stm32_port->swap) { > + val = readl_relaxed(port->membase + ofs->cr2); > + val |= USART_CR2_SWAP; > + writel_relaxed(val, port->membase + ofs->cr2); > + } > + > /* RX FIFO Flush */ > if (ofs->rqr != UNDEF_REG) > stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ); > @@ -758,7 +764,7 @@ static void stm32_usart_set_termios(struct uart_port *port, > cr1 = USART_CR1_TE | USART_CR1_RE; > if (stm32_port->fifoen) > cr1 |= USART_CR1_FIFOEN; > - cr2 = 0; > + cr2 = stm32_port->swap ? USART_CR2_SWAP : 0; > cr3 = readl_relaxed(port->membase + ofs->cr3); > cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE > | USART_CR3_TXFTCFG_MASK; > @@ -1006,6 +1012,9 @@ static int stm32_usart_init_port(struct stm32_port *stm32port, > return stm32port->wakeirq ? : -ENODEV; > } > > + stm32port->swap = stm32port->info->cfg.has_swap && > + of_property_read_bool(pdev->dev.of_node, "rx-tx-swap"); > + > stm32port->fifoen = stm32port->info->cfg.has_fifo; > > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h > index cb4f327c46db..bd18dd1c1bcd 100644 > --- a/drivers/tty/serial/stm32-usart.h > +++ b/drivers/tty/serial/stm32-usart.h > @@ -25,6 +25,7 @@ struct stm32_usart_offsets { > struct stm32_usart_config { > u8 uart_enable_bit; /* USART_CR1_UE */ > bool has_7bits_data; > + bool has_swap; > bool has_wakeup; > bool has_fifo; > int fifosize; > @@ -55,6 +56,7 @@ struct stm32_usart_info stm32f4_info = { > .cfg = { > .uart_enable_bit = 13, > .has_7bits_data = false, > + .has_swap = false, Hi Martin, Only one minor comment from me here. No need to add a false (zero) initialization in this struct. I'm not sure why this is the case for the has_7bits_data here... With that fixed, you can add my: Acked-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Thanks for your patch, Best Regards, Fabrice > .fifosize = 1, > } > }; > @@ -76,6 +78,7 @@ struct stm32_usart_info stm32f7_info = { > .cfg = { > .uart_enable_bit = 0, > .has_7bits_data = true, > + .has_swap = true, > .fifosize = 1, > } > }; > @@ -97,6 +100,7 @@ struct stm32_usart_info stm32h7_info = { > .cfg = { > .uart_enable_bit = 0, > .has_7bits_data = true, > + .has_swap = true, > .has_wakeup = true, > .has_fifo = true, > .fifosize = 16, > @@ -271,6 +275,7 @@ struct stm32_port { > int last_res; > bool tx_dma_busy; /* dma tx busy */ > bool hw_flow_control; > + bool swap; /* swap RX & TX pins */ > bool fifoen; > int wakeirq; > int rdr_mask; /* receive data register mask */ >
On 3/2/21 6:44 PM, Fabrice Gasnier wrote: > On 3/2/21 2:15 PM, Martin Devera wrote: >> STM32 F7/H7 usarts supports RX & TX pin swapping. >> Add option to turn it on. >> Tested on STM32MP157. >> >> Signed-off-by: Martin Devera <devik@eaxlabs.cz> >> --- >> drivers/tty/serial/stm32-usart.c | 11 ++++++++++- >> drivers/tty/serial/stm32-usart.h | 5 +++++ >> 2 files changed, 15 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c >> index b3675cf25a69..d390f7da1441 100644 >> --- a/drivers/tty/serial/stm32-usart.c >> +++ b/drivers/tty/serial/stm32-usart.c >> @@ -644,6 +644,12 @@ static int stm32_usart_startup(struct uart_port *port) >> if (ret) >> return ret; >> >> + if (stm32_port->swap) { >> + val = readl_relaxed(port->membase + ofs->cr2); >> + val |= USART_CR2_SWAP; >> + writel_relaxed(val, port->membase + ofs->cr2); >> + } >> + >> /* RX FIFO Flush */ >> if (ofs->rqr != UNDEF_REG) >> stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ); >> @@ -758,7 +764,7 @@ static void stm32_usart_set_termios(struct uart_port *port, >> cr1 = USART_CR1_TE | USART_CR1_RE; >> if (stm32_port->fifoen) >> cr1 |= USART_CR1_FIFOEN; >> - cr2 = 0; >> + cr2 = stm32_port->swap ? USART_CR2_SWAP : 0; >> cr3 = readl_relaxed(port->membase + ofs->cr3); >> cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE >> | USART_CR3_TXFTCFG_MASK; >> @@ -1006,6 +1012,9 @@ static int stm32_usart_init_port(struct stm32_port *stm32port, >> return stm32port->wakeirq ? : -ENODEV; >> } >> >> + stm32port->swap = stm32port->info->cfg.has_swap && >> + of_property_read_bool(pdev->dev.of_node, "rx-tx-swap"); >> + >> stm32port->fifoen = stm32port->info->cfg.has_fifo; >> >> res = platform_get_resource(pdev, IORESOURCE_MEM, 0); >> diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h >> index cb4f327c46db..bd18dd1c1bcd 100644 >> --- a/drivers/tty/serial/stm32-usart.h >> +++ b/drivers/tty/serial/stm32-usart.h >> @@ -25,6 +25,7 @@ struct stm32_usart_offsets { >> struct stm32_usart_config { >> u8 uart_enable_bit; /* USART_CR1_UE */ >> bool has_7bits_data; >> + bool has_swap; >> bool has_wakeup; >> bool has_fifo; >> int fifosize; >> @@ -55,6 +56,7 @@ struct stm32_usart_info stm32f4_info = { >> .cfg = { >> .uart_enable_bit = 13, >> .has_7bits_data = false, >> + .has_swap = false, > Hi Martin, > > Only one minor comment from me here. No need to add a false (zero) > initialization in this struct. I'm not sure why this is the case for the > has_7bits_data here... > > With that fixed, you can add my: > Acked-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> > The has_7bits_data was what made me a bit unsure. Ok fixed now. Thank you for your review. Martin
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml index 8631678283f9..6eab2debebb5 100644 --- a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml +++ b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml @@ -9,9 +9,6 @@ maintainers: title: STMicroelectronics STM32 USART bindings -allOf: - - $ref: rs485.yaml - properties: compatible: enum: @@ -40,6 +37,10 @@ properties: uart-has-rtscts: true + rx-tx-swap: + type: boolean + maxItems: 1 + dmas: minItems: 1 maxItems: 2 @@ -66,13 +67,24 @@ properties: linux,rs485-enabled-at-boot-time: true rs485-rx-during-tx: true -if: - required: - - st,hw-flow-ctrl -then: - properties: - cts-gpios: false - rts-gpios: false +allOf: + - $ref: rs485.yaml + - if: + required: + - st,hw-flow-ctrl + then: + properties: + cts-gpios: false + rts-gpios: false + - if: + required: + - rx-tx-swap + then: + properties: + compatible: + enum: + - st,stm32f7-uart + - st,stm32h7-uart required: - compatible
Add new rx-tx-swap property to allow for RX & TX pin swapping. Signed-off-by: Martin Devera <devik@eaxlabs.cz> --- .../devicetree/bindings/serial/st,stm32-uart.yaml | 32 +++++++++++++++------- 1 file changed, 22 insertions(+), 10 deletions(-)