| Message ID | 20210301064749.10392-2-zhangqing@rock-chips.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | clk: rockchip: add clock controller for rk3568 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 1 warnings, 60 lines checked |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
On 2021/3/1 下午2:47, Elaine Zhang wrote: > Document the device tree bindings of the rockchip Rk3568 SoC > clock driver in Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml. > > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Patch looks good to me. Reviewed-by: Kever Yang <kever.yang@rock-chips.com <mailto:kever.yang@rock-chips.com>> Thanks, - Kever > --- > .../bindings/clock/rockchip,rk3568-cru.yaml | 60 +++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > new file mode 100644 > index 000000000000..b2c26097827f > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ROCKCHIP rk3568 Family Clock Control Module Binding > + > +maintainers: > + - Elaine Zhang <zhangqing@rock-chips.com> > + - Heiko Stuebner <heiko@sntech.de> > + > +description: | > + The RK3568 clock controller generates the clock and also implements a > + reset controller for SoC peripherals. > + (examples: provide SCLK_UART1\PCLK_UART1 and SRST_P_UART1\SRST_S_UART1 for UART module) > + Each clock is assigned an identifier and client nodes can use this identifier > + to specify the clock which they consume. All available clocks are defined as > + preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be > + used in device tree sources. > + > +properties: > + compatible: > + enum: > + - rockchip,rk3568-cru > + - rockchip,rk3568-pmucru > + > + reg: > + maxItems: 1 > + > + "#clock-cells": > + const: 1 > + > + "#reset-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + - "#reset-cells" > + > +additionalProperties: false > + > +examples: > + # Clock Control Module node: > + - | > + pmucru: clock-controller@fdd00000 { > + compatible = "rockchip,rk3568-pmucru"; > + reg = <0xfdd00000 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + - | > + cru: clock-controller@fdd20000 { > + compatible = "rockchip,rk3568-cru"; > + reg = <0xfdd20000 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + };
On Mon, 01 Mar 2021 14:47:46 +0800, Elaine Zhang wrote: > Document the device tree bindings of the rockchip Rk3568 SoC > clock driver in Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml. > > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> > --- > .../bindings/clock/rockchip,rk3568-cru.yaml | 60 +++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml new file mode 100644 index 000000000000..b2c26097827f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROCKCHIP rk3568 Family Clock Control Module Binding + +maintainers: + - Elaine Zhang <zhangqing@rock-chips.com> + - Heiko Stuebner <heiko@sntech.de> + +description: | + The RK3568 clock controller generates the clock and also implements a + reset controller for SoC peripherals. + (examples: provide SCLK_UART1\PCLK_UART1 and SRST_P_UART1\SRST_S_UART1 for UART module) + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be + used in device tree sources. + +properties: + compatible: + enum: + - rockchip,rk3568-cru + - rockchip,rk3568-pmucru + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + # Clock Control Module node: + - | + pmucru: clock-controller@fdd00000 { + compatible = "rockchip,rk3568-pmucru"; + reg = <0xfdd00000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + - | + cru: clock-controller@fdd20000 { + compatible = "rockchip,rk3568-cru"; + reg = <0xfdd20000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + };
Document the device tree bindings of the rockchip Rk3568 SoC clock driver in Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> --- .../bindings/clock/rockchip,rk3568-cru.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml