| Message ID | 20210212143059.478554-1-dinguyen@kernel.org |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [PATCHv1,1/2] dt-bindings: documentation: add clock bindings information for eASIC N5X | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
Quoting Dinh Nguyen (2021-02-12 06:30:58) > Document the Agilex clock bindings, and add the clock header file. The > clock header is an enumeration of all the different clocks on the eASIC > N5X platform. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- Applied to clk-next
Quoting Dinh Nguyen (2021-02-12 06:30:59) > Add support for Intel's eASIC N5X platform. The clock manager driver for > the N5X is very similar to the Agilex platform, we can re-use most of > the Agilex clock driver. > > This patch makes the necessary changes for the driver to differentiate > between the Agilex and the N5X platforms. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml b/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml new file mode 100644 index 000000000000..8f45976e946e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel SoCFPGA eASIC N5X platform clock controller binding + +maintainers: + - Dinh Nguyen <dinguyen@kernel.org> + +description: + The Intel eASIC N5X Clock controller is an integrated clock controller, which + generates and supplies to all modules. + +properties: + compatible: + const: intel,easic-n5x-clkmgr + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock controller node: + - | + clkmgr: clock-controller@ffd10000 { + compatible = "intel,easic-n5x-clkmgr"; + reg = <0xffd10000 0x1000>; + clocks = <&osc1>; + #clock-cells = <1>; + }; +...
Document the Agilex clock bindings, and add the clock header file. The clock header is an enumeration of all the different clocks on the eASIC N5X platform. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- .../bindings/clock/intel,easic-n5x.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml