| Message ID | 20201204085835.2406541-3-atish.patra@wdc.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Add Microchip PolarFire Soc Support | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 2 warnings, 28 lines checked |
| robh/dt-meta-schema | success |
On Fri, Dec 04, 2020 at 12:58:32AM -0800, Atish Patra wrote: > Add YAML DT binding documentation for the Microchip PolarFire SoC. > It is documented at: > > https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide > > Signed-off-by: Atish Patra <atish.patra@wdc.com> > --- > .../devicetree/bindings/riscv/microchip.yaml | 28 +++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml > > diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml > new file mode 100644 > index 000000000000..66e63c2bf359 > --- /dev/null > +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml > @@ -0,0 +1,28 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR MIT) See what checkpatch.pl says. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/riscv/microchip.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip PolarFire SoC-based boards device tree bindings > + > +maintainers: > + - Cyril Jean <Cyril.Jean@microchip.com> > + - Lewis Hanly <lewis.hanly@microchip.com> > + > +description: > + Microchip PolarFire SoC-based boards > + > +properties: > + $nodename: > + const: '/' > + compatible: > + items: > + - enum: > + - microchip,mpfs-icicle-kit > + - const: microchip,polarfire-soc > + - const: microchip,mpfs Is this last compatible really useful? Usually better to just have SoC and board (or SoM plus baseboard) compatibles. Rob
diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml new file mode 100644 index 000000000000..66e63c2bf359 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0 OR MIT) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/microchip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PolarFire SoC-based boards device tree bindings + +maintainers: + - Cyril Jean <Cyril.Jean@microchip.com> + - Lewis Hanly <lewis.hanly@microchip.com> + +description: + Microchip PolarFire SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + items: + - enum: + - microchip,mpfs-icicle-kit + - const: microchip,polarfire-soc + - const: microchip,mpfs + +additionalProperties: true + +...
Add YAML DT binding documentation for the Microchip PolarFire SoC. It is documented at: https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide Signed-off-by: Atish Patra <atish.patra@wdc.com> --- .../devicetree/bindings/riscv/microchip.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml