diff mbox series

[v5,10/16] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA

Message ID 20201123023452.7894-11-jee.heng.sia@intel.com
State Changes Requested
Headers show
Series dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA | expand

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robh/dt-meta-schema success
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Commit Message

Sia Jee Heng Nov. 23, 2020, 2:34 a.m. UTC
Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
Schemas DT binding.

Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com>
---
 .../bindings/dma/snps,dw-axi-dmac.yaml        | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Rob Herring Nov. 30, 2020, 10:29 p.m. UTC | #1
On Mon, Nov 23, 2020 at 10:34:46AM +0800, Sia Jee Heng wrote:
> Add support for Intel KeemBay AxiDMA to the dw-axi-dmac
> Schemas DT binding.
> 
> Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com>
> ---
>  .../bindings/dma/snps,dw-axi-dmac.yaml        | 27 +++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> index 6c2e8e612af5..9e3ca9083814 100644
> --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> @@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller
>  
>  maintainers:
>    - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com

Also, for the first patch, missing a '>' on the end.

> +  - Jee Heng Sia <jee.heng.sia@intel.com>
>  
>  description: |
>   Synopsys DesignWare AXI DMA Controller DT Binding
> @@ -16,14 +17,18 @@ properties:
>    compatible:
>      enum:
>        - snps,axi-dma-1.01a
> +      - intel,kmb-axi-dma
>  
>    reg:
> +    minItems: 1
>      items:
>        - description: Address range of the DMAC registers
> +      - description: Address range of the DMAC APB registers

Nevermind for my 'reg' comment on the first patch.

>  
>    reg-names:
>      items:
>        - const: axidma_ctrl_regs
> +      - const: axidma_apb_regs
>  
>    interrupts:
>      maxItems: 1
> @@ -124,3 +129,25 @@ examples:
>           snps,priority = <0 1 2 3>;
>           snps,axi-max-burst-len = <16>;
>       };
> +
> +  - |

For what's just a new compatible and extra reg field, I don't think we 
need another example.

> +     #include <dt-bindings/interrupt-controller/arm-gic.h>
> +     #include <dt-bindings/interrupt-controller/irq.h>
> +     /* example with intel,kmb-axi-dma */
> +     #define KEEM_BAY_PSS_AXI_DMA
> +     #define KEEM_BAY_PSS_APB_AXI_DMA
> +     axi_dma: dma@28000000 {
> +         compatible = "intel,kmb-axi-dma";
> +         reg = <0x28000000 0x1000>, <0x20250000 0x24>;
> +         reg-names = "axidma_ctrl_regs", "axidma_apb_regs";
> +         interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> +         clock-names = "core-clk", "cfgr-clk";
> +         clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk KEEM_BAY_PSS_APB_AXI_DMA>;
> +         #dma-cells = <1>;
> +         dma-channels = <8>;
> +         snps,dma-masters = <1>;
> +         snps,data-width = <4>;
> +         snps,priority = <0 0 0 0 0 0 0 0>;
> +         snps,block-size = <1024 1024 1024 1024 1024 1024 1024 1024>;
> +         snps,axi-max-burst-len = <16>;
> +     };
> -- 
> 2.18.0
>
Sia Jee Heng Dec. 9, 2020, 1:53 a.m. UTC | #2
> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: 01 December 2020 6:29 AM
> To: Sia, Jee Heng <jee.heng.sia@intel.com>
> Cc: vkoul@kernel.org; Eugeniy.Paltsev@synopsys.com;
> andriy.shevchenko@linux.intel.com; dmaengine@vger.kernel.org;
> linux-kernel@vger.kernel.org; devicetree@vger.kernel.org
> Subject: Re: [PATCH v5 10/16] dt-binding: dma: dw-axi-dmac: Add
> support for Intel KeemBay AxiDMA
> 
> On Mon, Nov 23, 2020 at 10:34:46AM +0800, Sia Jee Heng wrote:
> > Add support for Intel KeemBay AxiDMA to the dw-axi-dmac Schemas
> DT
> > binding.
> >
> > Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com>
> > ---
> >  .../bindings/dma/snps,dw-axi-dmac.yaml        | 27
> +++++++++++++++++++
> >  1 file changed, 27 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> > b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
> > index 6c2e8e612af5..9e3ca9083814 100644
> > --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-
> dmac.yaml
> > +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-
> dmac.yaml
> > @@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller
> >
> >  maintainers:
> >    - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com
> 
> Also, for the first patch, missing a '>' on the end.
[>>] Got it. Thanks for the catch.
> 
> > +  - Jee Heng Sia <jee.heng.sia@intel.com>
> >
> >  description: |
> >   Synopsys DesignWare AXI DMA Controller DT Binding @@ -16,14
> +17,18
> > @@ properties:
> >    compatible:
> >      enum:
> >        - snps,axi-dma-1.01a
> > +      - intel,kmb-axi-dma
> >
> >    reg:
> > +    minItems: 1
> >      items:
> >        - description: Address range of the DMAC registers
> > +      - description: Address range of the DMAC APB registers
> 
> Nevermind for my 'reg' comment on the first patch.
[>>] OK.
> 
> >
> >    reg-names:
> >      items:
> >        - const: axidma_ctrl_regs
> > +      - const: axidma_apb_regs
> >
> >    interrupts:
> >      maxItems: 1
> > @@ -124,3 +129,25 @@ examples:
> >           snps,priority = <0 1 2 3>;
> >           snps,axi-max-burst-len = <16>;
> >       };
> > +
> > +  - |
> 
> For what's just a new compatible and extra reg field, I don't think we
> need another example.
[>>] I would suggest to provide the below example if you don't see any harmful.
> 
[>>] The reason is because those compatible and new reg help customer understand the setup
> > +     #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +     #include <dt-bindings/interrupt-controller/irq.h>
> > +     /* example with intel,kmb-axi-dma */
> > +     #define KEEM_BAY_PSS_AXI_DMA
> > +     #define KEEM_BAY_PSS_APB_AXI_DMA
> > +     axi_dma: dma@28000000 {
> > +         compatible = "intel,kmb-axi-dma";
> > +         reg = <0x28000000 0x1000>, <0x20250000 0x24>;
> > +         reg-names = "axidma_ctrl_regs", "axidma_apb_regs";
> > +         interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> > +         clock-names = "core-clk", "cfgr-clk";
> > +         clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk
> KEEM_BAY_PSS_APB_AXI_DMA>;
> > +         #dma-cells = <1>;
> > +         dma-channels = <8>;
> > +         snps,dma-masters = <1>;
> > +         snps,data-width = <4>;
> > +         snps,priority = <0 0 0 0 0 0 0 0>;
> > +         snps,block-size = <1024 1024 1024 1024 1024 1024 1024
> 1024>;
> > +         snps,axi-max-burst-len = <16>;
> > +     };
> > --
> > 2.18.0
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index 6c2e8e612af5..9e3ca9083814 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -8,6 +8,7 @@  title: Synopsys DesignWare AXI DMA Controller
 
 maintainers:
   - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com
+  - Jee Heng Sia <jee.heng.sia@intel.com>
 
 description: |
  Synopsys DesignWare AXI DMA Controller DT Binding
@@ -16,14 +17,18 @@  properties:
   compatible:
     enum:
       - snps,axi-dma-1.01a
+      - intel,kmb-axi-dma
 
   reg:
+    minItems: 1
     items:
       - description: Address range of the DMAC registers
+      - description: Address range of the DMAC APB registers
 
   reg-names:
     items:
       - const: axidma_ctrl_regs
+      - const: axidma_apb_regs
 
   interrupts:
     maxItems: 1
@@ -124,3 +129,25 @@  examples:
          snps,priority = <0 1 2 3>;
          snps,axi-max-burst-len = <16>;
      };
+
+  - |
+     #include <dt-bindings/interrupt-controller/arm-gic.h>
+     #include <dt-bindings/interrupt-controller/irq.h>
+     /* example with intel,kmb-axi-dma */
+     #define KEEM_BAY_PSS_AXI_DMA
+     #define KEEM_BAY_PSS_APB_AXI_DMA
+     axi_dma: dma@28000000 {
+         compatible = "intel,kmb-axi-dma";
+         reg = <0x28000000 0x1000>, <0x20250000 0x24>;
+         reg-names = "axidma_ctrl_regs", "axidma_apb_regs";
+         interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+         clock-names = "core-clk", "cfgr-clk";
+         clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk KEEM_BAY_PSS_APB_AXI_DMA>;
+         #dma-cells = <1>;
+         dma-channels = <8>;
+         snps,dma-masters = <1>;
+         snps,data-width = <4>;
+         snps,priority = <0 0 0 0 0 0 0 0>;
+         snps,block-size = <1024 1024 1024 1024 1024 1024 1024 1024>;
+         snps,axi-max-burst-len = <16>;
+     };