Message ID | 20201112160424.1383051-2-gregory.clement@bootlin.com |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | Extend irqchip ocelot driver to support other SoCs | expand |
Context | Check | Description |
---|---|---|
robh/dt-meta-schema | fail | build log |
robh/checkpatch | warning | total: 0 errors, 2 warnings, 59 lines checked |
On Thu, 12 Nov 2020 17:04:20 +0100, Gregory CLEMENT wrote: > Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt > Controller to YAML format > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > --- > .../mscc,ocelot-icpu-intr.txt | 21 ------- > .../mscc,ocelot-icpu-intr.yaml | 59 +++++++++++++++++++ > 2 files changed, 59 insertions(+), 21 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml:59:4: [error] no new line character at the end of file (new-line-at-end-of-file) dtschema/dtc warnings/errors: make[1]: *** [Documentation/devicetree/bindings/Makefile:59: Documentation/devicetree/bindings/processed-schema-examples.json] Error 123 make: *** [Makefile:1364: dt_binding_check] Error 2 See https://patchwork.ozlabs.org/patch/1399077 The base for the patch is generally the last rc1. Any dependencies should be noted. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
Hello Rob, > On Thu, 12 Nov 2020 17:04:20 +0100, Gregory CLEMENT wrote: >> Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt >> Controller to YAML format >> >> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> >> --- >> .../mscc,ocelot-icpu-intr.txt | 21 ------- >> .../mscc,ocelot-icpu-intr.yaml | 59 +++++++++++++++++++ >> 2 files changed, 59 insertions(+), 21 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml >> > > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > ./Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml:59:4: [error] no new line character at the end of file (new-line-at-end-of-file) > > dtschema/dtc warnings/errors: > make[1]: *** [Documentation/devicetree/bindings/Makefile:59: Documentation/devicetree/bindings/processed-schema-examples.json] Error 123 > make: *** [Makefile:1364: dt_binding_check] Error 2 > > > See https://patchwork.ozlabs.org/patch/1399077 > > The base for the patch is generally the last rc1. Any dependencies > should be noted. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: I actually ran 'make dt_binding_check' and in the documentation there was no reference of Documentation/devicetree/writing-schema.rst the need of 'yamllint' while in the dependencies section of it was mentioned the need of 'libyaml-dev'. What do you think about updating the documentation ? > > pip3 install dtschema --upgrade > > Please check and re-submit. Sure I am doing it right now. Gregory >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt deleted file mode 100644 index f5baeccb689f..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt +++ /dev/null @@ -1,21 +0,0 @@ -Microsemi Ocelot SoC ICPU Interrupt Controller - -Required properties: - -- compatible : should be "mscc,ocelot-icpu-intr" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. -- interrupts : Specifies the CPU interrupt the controller is connected to. - -Example: - - intc: interrupt-controller@70000070 { - compatible = "mscc,ocelot-icpu-intr"; - reg = <0x70000070 0x70>; - #interrupt-cells = <1>; - interrupt-controller; - interrupt-parent = <&cpuintc>; - interrupts = <2>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml new file mode 100644 index 000000000000..afd00f9c9d74 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Microsemi Ocelot SoC ICPU Interrupt Controller + +maintainers: + - Alexandre Belloni <alexandre.belloni@bootlin.com> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +description: | + the Microsemi Ocelot interrupt controller that is part of the + ICPU. It is connected directly to the MIPS core interrupt + controller. + +properties: + compatible: + items: + - enum: + - mscc,ocelot-icpu-intr + + '#interrupt-cells': + const: 1 + + '#address-cells': + const: 0 + + interrupt-controller: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - '#interrupt-cells' + - '#address-cells' + - interrupt-controller + - reg + +additionalProperties: false + +examples: + - | + intc: interrupt-controller@70000070 { + compatible = "mscc,ocelot-icpu-intr"; + reg = <0x70000070 0x70>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; +... \ No newline at end of file
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt Controller to YAML format Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> --- .../mscc,ocelot-icpu-intr.txt | 21 ------- .../mscc,ocelot-icpu-intr.yaml | 59 +++++++++++++++++++ 2 files changed, 59 insertions(+), 21 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml