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[v3,6/6] dt-bindings: spi: Add compatible for Intel LGM SoC

Message ID 20201026094519.56083-7-vadivel.muruganx.ramuthevar@linux.intel.com
State Superseded
Headers show
Series spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC | expand

Checks

Context Check Description
robh/checkpatch warning total: 0 errors, 1 warnings, 7 lines checked

Commit Message

Ramuthevar, Vadivel MuruganX Oct. 26, 2020, 9:45 a.m. UTC
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

Add compatible string for Intel LGM SoC.

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
---
 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
index b1b3d3ce0cc2..2b862190b552 100644
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -19,6 +19,7 @@  properties:
          - const: cdns,qspi-nor
          - const: ti,k2g-qspi, cdns,qspi-nor
          - const: ti,am654-ospi, cdns,qspi-nor
+         - const: intel,lgm-qspi, cdns,qspi-nor
 
   reg:
     items: