diff mbox series

[v2,10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml

Message ID 20201012061225.1597-11-thunder.leizhen@huawei.com
State Accepted
Headers show
Series clean up all Hisilicon-related errors detected by DT schema on arm32 | expand

Checks

Context Check Description
robh/checkpatch success

Commit Message

Zhen Lei Oct. 12, 2020, 6:12 a.m. UTC
Add properties: #address-cells, #size-cells and ranges. Due to the
Hisilicon CPU controller node may contains child nodes, change the value
of "additionalProperties" from "false" to "type: object".

The corresponding examples are also added.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
 .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

Comments

Rob Herring Oct. 12, 2020, 6:48 p.m. UTC | #1
On Mon, 12 Oct 2020 14:12:25 +0800, Zhen Lei wrote:
> Add properties: #address-cells, #size-cells and ranges. Due to the
> Hisilicon CPU controller node may contains child nodes, change the value
> of "additionalProperties" from "false" to "type: object".
> 
> The corresponding examples are also added.
> 
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
>  .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++++++++++-
>  1 file changed, 26 insertions(+), 1 deletion(-)
> 

Applied, thanks!
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
index f6a314db3a59416..528dad4cde3cd19 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
@@ -21,9 +21,34 @@  properties:
   reg:
     maxItems: 1
 
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  ranges: true
+
 required:
   - compatible
   - reg
 
-additionalProperties: false
+additionalProperties:
+  type: object
+
+examples:
+  - |
+    cpuctrl@a22000 {
+        compatible = "hisilicon,cpuctrl";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0x00a22000 0x2000>;
+        ranges = <0 0x00a22000 0x2000>;
+
+        clock: clock@0 {
+            compatible = "hisilicon,hix5hd2-clock";
+            reg = <0 0x2000>;
+            #clock-cells = <1>;
+        };
+    };
 ...