diff mbox series

[v5,02/17] dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers

Message ID 20200929141454.2312-3-thunder.leizhen@huawei.com
State Accepted
Headers show
Series add support for Hisilicon SD5203 SoC | expand

Checks

Context Check Description
robh/checkpatch success

Commit Message

Zhen Lei Sept. 29, 2020, 2:14 p.m. UTC
The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS
subsystem controller, HiP05/HiP06 PERI subsystem controller and
HiP05/HiP06 DSA subsystem controller is in syscon.yaml now.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
 .../bindings/arm/hisilicon/hisilicon.txt           | 68 ----------------------
 1 file changed, 68 deletions(-)

Comments

Rob Herring Sept. 29, 2020, 8:24 p.m. UTC | #1
On Tue, 29 Sep 2020 22:14:39 +0800, Zhen Lei wrote:
> The compatible strings of Hi6220 SRAM controller, HiP05/HiP06 PCIe-SAS
> subsystem controller, HiP05/HiP06 PERI subsystem controller and
> HiP05/HiP06 DSA subsystem controller is in syscon.yaml now.
> 
> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
> ---
>  .../bindings/arm/hisilicon/hisilicon.txt           | 68 ----------------------
>  1 file changed, 68 deletions(-)
> 

Applied, thanks!
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index a97f643e7d1c760..54f423d87a80a6a 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -186,24 +186,6 @@  Example:
 		#clock-cells = <1>;
 	};
 
-
-Hisilicon Hi6220 SRAM controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-sramctrl", "syscon"
-- reg : Register address and size
-
-Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several
-SRAM banks for power management, modem, security, etc. Further, use "syscon"
-managing the common sram which can be shared by multiple modules.
-
-Example:
-	/*for Hi6220*/
-	sram: sram@fff80000 {
-		compatible = "hisilicon,hi6220-sramctrl", "syscon";
-		reg = <0x0 0xfff80000 0x0 0x12000>;
-	};
-
 -----------------------------------------------------------------------
 Hisilicon HiP01 system controller
 
@@ -226,56 +208,6 @@  Example:
 	};
 
 -----------------------------------------------------------------------
-Hisilicon HiP05/HiP06 PCIe-SAS sub system controller
-
-Required properties:
-- compatible : "hisilicon,pcie-sas-subctrl", "syscon";
-- reg : Register address and size
-
-The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in
-HiP05 or HiP06 Soc to implement some basic configurations.
-
-Example:
-	/* for HiP05 PCIe-SAS sub system */
-	pcie_sas: system_controller@b0000000 {
-		compatible = "hisilicon,pcie-sas-subctrl", "syscon";
-		reg = <0xb0000000 0x10000>;
-	};
-
-Hisilicon HiP05/HiP06 PERI sub system controller
-
-Required properties:
-- compatible : "hisilicon,peri-subctrl", "syscon";
-- reg : Register address and size
-
-The PERI sub system controller is shared by peripheral controllers in
-HiP05 or HiP06 Soc to implement some basic configurations. The peripheral
-controllers include mdio, ddr, iic, uart, timer and so on.
-
-Example:
-	/* for HiP05 sub peri system */
-	peri_c_subctrl: syscon@80000000 {
-		compatible = "hisilicon,peri-subctrl", "syscon";
-		reg = <0x0 0x80000000 0x0 0x10000>;
-	};
-
-Hisilicon HiP05/HiP06 DSA sub system controller
-
-Required properties:
-- compatible : "hisilicon,dsa-subctrl", "syscon";
-- reg : Register address and size
-
-The DSA sub system controller is shared by peripheral controllers in
-HiP05 or HiP06 Soc to implement some basic configurations.
-
-Example:
-	/* for HiP05 dsa sub system */
-	pcie_sas: system_controller@a0000000 {
-		compatible = "hisilicon,dsa-subctrl", "syscon";
-		reg = <0xa0000000 0x10000>;
-	};
-
------------------------------------------------------------------------
 Hisilicon CPU controller
 
 Required properties: