| Message ID | 20200916075949.28479-1-camel.guo@axis.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [v3,1/2] dt-bindings: tlv320adcx140: Add GPIO config and drive config | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success |
Camel On 9/16/20 2:59 AM, Camel Guo wrote: > From: Camel Guo <camelg@axis.com> > > Add support to configure the GPIO pin to the specific configuration. > The GPIO pin can be configured as GPO, IRQ, SDOUT2, PDMCLK, MICBASE_EN, > GPI, MCLK, SDIN, PDMDIN1, PDMDIN2, PDMDIN3 or PDMDIN4 and the output > drive can be configured with various configuration. > > Signed-off-by: Camel Guo <camelg@axis.com> > --- > v3: > - Add ADCX140_NUM_GPIO_CFGS avoiding using magic number > - Remove unneeded check on ret in adcx140_configure_gpio > > sound/soc/codecs/tlv320adcx140.c | 40 ++++++++++++++++++++++++++++++++ > sound/soc/codecs/tlv320adcx140.h | 5 ++++ > 2 files changed, 45 insertions(+) > > diff --git a/sound/soc/codecs/tlv320adcx140.c b/sound/soc/codecs/tlv320adcx140.c > index f33ee604ee78..fe6fc6df66cc 100644 > --- a/sound/soc/codecs/tlv320adcx140.c > +++ b/sound/soc/codecs/tlv320adcx140.c > @@ -837,6 +837,42 @@ static int adcx140_configure_gpo(struct adcx140_priv *adcx140) > > } > > +static int adcx140_configure_gpio(struct adcx140_priv *adcx140) > +{ > + int gpio_count = 0; > + u32 gpio_outputs[ADCX140_NUM_GPIO_CFGS]; > + u32 gpio_output_val = 0; > + int ret; > + > + gpio_count = device_property_count_u32(adcx140->dev, > + "ti,gpio-config"); > + if (gpio_count == 0) > + return 0; > + > + if (gpio_count != ADCX140_NUM_GPIO_CFGS) > + return -EINVAL; > + > + ret = device_property_read_u32_array(adcx140->dev, "ti,gpio-config", > + gpio_outputs, gpio_count); > + if (ret) > + return ret; > + > + if (gpio_outputs[0] > ADCX140_GPIO_CFG_MAX) { > + dev_err(adcx140->dev, "GPIO config out of range\n"); > + return -EINVAL; > + } > + > + if (gpio_outputs[1] > ADCX140_GPIO_DRV_MAX) { > + dev_err(adcx140->dev, "GPIO drive out of range\n"); > + return -EINVAL; > + } > + > + gpio_output_val = gpio_outputs[0] << ADCX140_GPIO_SHIFT > + | gpio_outputs[1]; > + > + return regmap_write(adcx140->regmap, ADCX140_GPIO_CFG0, gpio_output_val); > +} > + > static int adcx140_codec_probe(struct snd_soc_component *component) > { > struct adcx140_priv *adcx140 = snd_soc_component_get_drvdata(component); > @@ -934,6 +970,10 @@ static int adcx140_codec_probe(struct snd_soc_component *component) > return ret; > } > > + ret = adcx140_configure_gpio(adcx140); > + if (ret) > + return ret; > + > ret = adcx140_configure_gpo(adcx140); > if (ret) > goto out; > diff --git a/sound/soc/codecs/tlv320adcx140.h b/sound/soc/codecs/tlv320adcx140.h > index eedbc1d7221f..9d04dec374d1 100644 > --- a/sound/soc/codecs/tlv320adcx140.h > +++ b/sound/soc/codecs/tlv320adcx140.h > @@ -145,4 +145,9 @@ > #define ADCX140_GPO_CFG_MAX 4 > #define ADCX140_GPO_DRV_MAX 5 > > +#define ADCX140_NUM_GPIO_CFGS 2 > +#define ADCX140_GPIO_SHIFT 4 > +#define ADCX140_GPIO_CFG_MAX 15 > +#define ADCX140_GPIO_DRV_MAX 5 > + > #endif /* _TLV320ADCX140_ */ Acked-by: Dan Murphy <dmurphy@ti.com>
On Wed, Sep 16, 2020 at 09:59:49AM +0200, Camel Guo wrote: > From: Camel Guo <camelg@axis.com> > > Add support to configure the GPIO pin to the specific configuration. > The GPIO pin can be configured as GPO, IRQ, SDOUT2, PDMCLK, MICBASE_EN, > GPI, MCLK, SDIN, PDMDIN1, PDMDIN2, PDMDIN3 or PDMDIN4 and the output > drive can be configured with various configuration. This doesn't apply against current code, please check and resend.
On Wed, 16 Sep 2020 09:59:48 +0200, Camel Guo wrote: > Add properties for configuring the General Purpose Input Output (GPIO). > There are 2 settings for GPIO, configuration and the output drive type. Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/2] dt-bindings: tlv320adcx140: Add GPIO config and drive config commit: 15b3d324c8980022071710b5096b705eb6b74fca [2/2] ASoC: tlv320adcx140: Add support for configuring GPIO pin commit: d5214321498a43558d9ffcce4153775c2c296bad All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml index f578f17f3e04..2f95ccde4dc3 100644 --- a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml +++ b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml @@ -134,6 +134,49 @@ patternProperties: 4d - Drive weak low and active high 5d - Drive Hi-Z and active high + ti,gpio-config: + description: | + Defines the configuration and output drive for the General Purpose + Input and Output pin (GPIO1). Its value is a pair, the first value is for + the configuration type and the second value is for the output drive + type. The array is defined as <GPIO1_CFG GPIO1_DRV> + + configuration for the GPIO pin can be one of the following: + 0 - disabled + 1 - GPIO1 is configured as a general-purpose output (GPO) + 2 - (default) GPIO1 is configured as a device interrupt output (IRQ) + 3 - GPIO1 is configured as a secondary ASI output (SDOUT2) + 4 - GPIO1 is configured as a PDM clock output (PDMCLK) + 8 - GPIO1 is configured as an input to control when MICBIAS turns on or + off (MICBIAS_EN) + 9 - GPIO1 is configured as a general-purpose input (GPI) + 10 - GPIO1 is configured as a master clock input (MCLK) + 11 - GPIO1 is configured as an ASI input for daisy-chain (SDIN) + 12 - GPIO1 is configured as a PDM data input for channel 1 and channel 2 + (PDMDIN1) + 13 - GPIO1 is configured as a PDM data input for channel 3 and channel 4 + (PDMDIN2) + 14 - GPIO1 is configured as a PDM data input for channel 5 and channel 6 + (PDMDIN3) + 15 - GPIO1 is configured as a PDM data input for channel 7 and channel 8 + (PDMDIN4) + + output drive type for the GPIO pin can be one of the following: + 0 - Hi-Z output + 1 - Drive active low and active high + 2 - (default) Drive active low and weak high + 3 - Drive active low and Hi-Z + 4 - Drive weak low and active high + 5 - Drive Hi-Z and active high + + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - minItems: 2 + maxItems: 2 + items: + maximum: 15 + default: [2, 2] + required: - compatible - reg @@ -150,6 +193,7 @@ examples: ti,mic-bias-source = <6>; ti,pdm-edge-select = <0 1 0 1>; ti,gpi-config = <4 5 6 7>; + ti,gpio-config = <10 2>; ti,gpo-config-1 = <0 0>; ti,gpo-config-2 = <0 0>; reset-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;