| Message ID | 20200907072708.26043-2-narmstrong@baylibre.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [1/2] dt-bindings: phy: add Amlogic AXG MIPI D-PHY bindings | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success |
On Mon, Sep 07, 2020 at 09:27:07AM +0200, Neil Armstrong wrote: > The Amlogic AXg SoCs embeds a MIPI D-PHY to communicate with DSI > panels, this adds the bindings. > > This D-PHY depends on a separate analog PHY. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > .../bindings/phy/amlogic,axg-mipi-dphy.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml > new file mode 100644 > index 000000000000..f7ae1135288b > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2020 BayLibre, SAS > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/phy/amlogic,axg-mipi-dphy.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic AXG MIPI D-PHY > + > +maintainers: > + - Neil Armstrong <narmstrong@baylibre.com> > + > +properties: > + compatible: > + enum: > + - amlogic,axg-mipi-dphy > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + items: > + - const: pclk > + > + resets: > + maxItems: 1 > + > + reset-names: > + items: > + - const: phy > + > + "#phy-cells": > + const: 0 > + > + phys: > + maxItems: 1 > + > + phy-names: > + items: > + - const: analog > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - resets > + - reset-names > + - phys > + - phy-names > + - "#phy-cells" additionalProperties: false With that, Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml new file mode 100644 index 000000000000..f7ae1135288b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,axg-mipi-dphy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic AXG MIPI D-PHY + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + +properties: + compatible: + enum: + - amlogic,axg-mipi-dphy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pclk + + resets: + maxItems: 1 + + reset-names: + items: + - const: phy + + "#phy-cells": + const: 0 + + phys: + maxItems: 1 + + phy-names: + items: + - const: analog + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - phys + - phy-names + - "#phy-cells" + +examples: + - | + phy@ff640000 { + compatible = "amlogic,axg-mipi-dphy"; + reg = <0xff640000 0x100>; + clocks = <&clk_mipi_dsi_phy>; + clock-names = "pclk"; + resets = <&reset_phy>; + reset-names = "phy"; + phys = <&mipi_pcie_analog_dphy>; + phy-names = "analog"; + #phy-cells = <0>; + };
The Amlogic AXg SoCs embeds a MIPI D-PHY to communicate with DSI panels, this adds the bindings. This D-PHY depends on a separate analog PHY. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- .../bindings/phy/amlogic,axg-mipi-dphy.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml