Message ID | 20200817024842.5289-3-crystal.guo@mediatek.com |
---|---|
State | Superseded, archived |
Headers | show |
Series | introduce TI reset controller for MT8192 SoC | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success |
diff --git a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt index ab041032339b..5a0e9365b51b 100644 --- a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt +++ b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt @@ -25,6 +25,7 @@ Required properties: "ti,k2l-pscrst" "ti,k2hk-pscrst" "ti,syscon-reset" + "mediatek,infra-reset", "ti,syscon-reset" - #reset-cells : Should be 1. Please see the reset consumer node below for usage details - ti,reset-bits : Contains the reset control register information
The TI syscon reset controller provides a common reset management, and is suitable for MTK SoCs. Add compatible 'mediatek,infra-reset', which denotes to use ti reset-controller driver directly. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- Documentation/devicetree/bindings/reset/ti-syscon-reset.txt | 1 + 1 file changed, 1 insertion(+)