diff mbox series

[v7,1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller

Message ID 20200715090342.28339-2-yifeng.zhao@rock-chips.com
State Changes Requested
Headers show
Series Add Rockchip NFC drivers for RK3308 and others | expand

Checks

Context Check Description
robh/dt-meta-schema fail build log
robh/checkpatch success
robh/dt-meta-schema fail build log
robh/checkpatch success

Commit Message

Yifeng Zhao July 15, 2020, 9:03 a.m. UTC
Documentation support for Rockchip RK3xxx NAND flash controllers

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
---

Changes in v7:
- Fix some wrong define

Changes in v6:
- Fix some wrong define
- Modified the definition of compatible

Changes in v5:
- Fix some wrong define.
- Add boot-medium define.
- Remove some compatible define.

Changes in v4:
- The compatible define with rkxx_nfc.
- Add assigned-clocks.
- Fix some wrong defineChanges in.

Changes in v3:
- Change the title for the dt-bindings.

Changes in v2: None

 .../mtd/rockchip,nand-controller.yaml         | 162 ++++++++++++++++++
 1 file changed, 162 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml

Comments

Rob Herring July 15, 2020, 5:53 p.m. UTC | #1
On Wed, 15 Jul 2020 17:03:39 +0800, Yifeng Zhao wrote:
> Documentation support for Rockchip RK3xxx NAND flash controllers
> 
> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
> ---
> 
> Changes in v7:
> - Fix some wrong define
> 
> Changes in v6:
> - Fix some wrong define
> - Modified the definition of compatible
> 
> Changes in v5:
> - Fix some wrong define.
> - Add boot-medium define.
> - Remove some compatible define.
> 
> Changes in v4:
> - The compatible define with rkxx_nfc.
> - Add assigned-clocks.
> - Fix some wrong defineChanges in.
> 
> Changes in v3:
> - Change the title for the dt-bindings.
> 
> Changes in v2: None
> 
>  .../mtd/rockchip,nand-controller.yaml         | 162 ++++++++++++++++++
>  1 file changed, 162 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml: example-0: nand-controller@ff4b0000:reg:0: [0, 4283105280, 0, 16384] is too long


See https://patchwork.ozlabs.org/patch/1329325

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.
Yifeng Zhao July 16, 2020, 2:04 a.m. UTC | #2
Hi Rob,

>On Wed, 15 Jul 2020 17:03:39 +0800, Yifeng Zhao wrote:
>> Documentation support for Rockchip RK3xxx NAND flash controllers
>>
>> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
>> ---
>>
>> Changes in v7:
>> - Fix some wrong define
>>
>> Changes in v6:
>> - Fix some wrong define
>> - Modified the definition of compatible
>>
>> Changes in v5:
>> - Fix some wrong define.
>> - Add boot-medium define.
>> - Remove some compatible define.
>>
>> Changes in v4:
>> - The compatible define with rkxx_nfc.
>> - Add assigned-clocks.
>> - Fix some wrong defineChanges in.
>>
>> Changes in v3:
>> - Change the title for the dt-bindings.
>>
>> Changes in v2: None
>>
>>  .../mtd/rockchip,nand-controller.yaml         | 162 ++++++++++++++++++
>>  1 file changed, 162 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
>>
>
>
>My bot found errors running 'make dt_binding_check' on your patch:
>
>/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml: example-0: nand-controller@ff4b0000:reg:0: [0, 4283105280, 0, 16384] is too long
>
>
>See https://patchwork.ozlabs.org/patch/1329325
>
>If you already ran 'make dt_binding_check' and didn't see the above
>error(s), then make sure dt-schema is up to date:
>
>pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
>
>Please check and re-submit.

make ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml 
  HOSTCC  scripts/basic/fixdep
  HOSTCC  scripts/dtc/dtc.o
  HOSTCC  scripts/dtc/flattree.o
  HOSTCC  scripts/dtc/fstree.o
  HOSTCC  scripts/dtc/data.o
  HOSTCC  scripts/dtc/livetree.o
  HOSTCC  scripts/dtc/treesource.o
  HOSTCC  scripts/dtc/srcpos.o
  HOSTCC  scripts/dtc/checks.o
  HOSTCC  scripts/dtc/util.o
  LEX     scripts/dtc/dtc-lexer.lex.c
  YACC    scripts/dtc/dtc-parser.tab.[ch]
  HOSTCC  scripts/dtc/dtc-lexer.lex.o
  HOSTCC  scripts/dtc/dtc-parser.tab.o
  HOSTCC  scripts/dtc/yamltree.o
  HOSTLD  scripts/dtc/dtc
  CHKDT   Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
  SCHEMA  Documentation/devicetree/bindings/processed-schema-examples.yaml
  DTC     Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml
  CHECK   Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml
/home/yifeng/work/linux/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml: example-0: nand-controller@ff4b0000:reg:0: [0, 4283105280, 0, 16384] is too long

I already ran the "make dt_binding_check" before submit this patch and found this issue.
The dts examples is for RK3308, ARCH=arm64, and the reg define is correct.
I thought there was something wrong with the check, or something configuration I missed.
Please give me some suggestions.


diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
index 493705a55638..b9d7a8c79402 100644
--- a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
+++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
@@ -132,7 +132,7 @@ examples:
     nfc: nand-controller@ff4b0000 {
       compatible = "rockchip,rk3308-nfc",
                    "rockchip,rv1108-nfc";
-      reg = <0x0 0xff4b0000 0x0 0x4000>;
+      reg = <0xff4b0000 0x4000>;
       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
       clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
       clock-names = "ahb", "nfc";

make ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml 
  SCHEMA  Documentation/devicetree/bindings/processed-schema-examples.yaml
  CHKDT   Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
  DTC     Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml
  CHECK   Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml

yifeng.zhao
Rob Herring July 16, 2020, 4:33 p.m. UTC | #3
On Wed, Jul 15, 2020 at 8:04 PM 赵仪峰 <yifeng.zhao@rock-chips.com> wrote:
>
> Hi Rob,
>
> >On Wed, 15 Jul 2020 17:03:39 +0800, Yifeng Zhao wrote:
> >> Documentation support for Rockchip RK3xxx NAND flash controllers
> >>
> >> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
> >> ---
> >>
> >> Changes in v7:
> >> - Fix some wrong define
> >>
> >> Changes in v6:
> >> - Fix some wrong define
> >> - Modified the definition of compatible
> >>
> >> Changes in v5:
> >> - Fix some wrong define.
> >> - Add boot-medium define.
> >> - Remove some compatible define.
> >>
> >> Changes in v4:
> >> - The compatible define with rkxx_nfc.
> >> - Add assigned-clocks.
> >> - Fix some wrong defineChanges in.
> >>
> >> Changes in v3:
> >> - Change the title for the dt-bindings.
> >>
> >> Changes in v2: None
> >>
> >>  .../mtd/rockchip,nand-controller.yaml         | 162 ++++++++++++++++++
> >>  1 file changed, 162 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
> >>
> >
> >
> >My bot found errors running 'make dt_binding_check' on your patch:
> >
> >/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml: example-0: nand-controller@ff4b0000:reg:0: [0, 4283105280, 0, 16384] is too long
> >
> >
> >See https://patchwork.ozlabs.org/patch/1329325
> >
> >If you already ran 'make dt_binding_check' and didn't see the above
> >error(s), then make sure dt-schema is up to date:
> >
> >pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
> >
> >Please check and re-submit.
>
> make ARCH=arm64 dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
>   HOSTCC  scripts/basic/fixdep
>   HOSTCC  scripts/dtc/dtc.o
>   HOSTCC  scripts/dtc/flattree.o
>   HOSTCC  scripts/dtc/fstree.o
>   HOSTCC  scripts/dtc/data.o
>   HOSTCC  scripts/dtc/livetree.o
>   HOSTCC  scripts/dtc/treesource.o
>   HOSTCC  scripts/dtc/srcpos.o
>   HOSTCC  scripts/dtc/checks.o
>   HOSTCC  scripts/dtc/util.o
>   LEX     scripts/dtc/dtc-lexer.lex.c
>   YACC    scripts/dtc/dtc-parser.tab.[ch]
>   HOSTCC  scripts/dtc/dtc-lexer.lex.o
>   HOSTCC  scripts/dtc/dtc-parser.tab.o
>   HOSTCC  scripts/dtc/yamltree.o
>   HOSTLD  scripts/dtc/dtc
>   CHKDT   Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
>   SCHEMA  Documentation/devicetree/bindings/processed-schema-examples.yaml
>   DTC     Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml
>   CHECK   Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml
> /home/yifeng/work/linux/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.example.dt.yaml: example-0: nand-controller@ff4b0000:reg:0: [0, 4283105280, 0, 16384] is too long
>
> I already ran the "make dt_binding_check" before submit this patch and found this issue.
> The dts examples is for RK3308, ARCH=arm64, and the reg define is correct.
> I thought there was something wrong with the check, or something configuration I missed.
> Please give me some suggestions.
>
>
> diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
> index 493705a55638..b9d7a8c79402 100644
> --- a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
> @@ -132,7 +132,7 @@ examples:
>      nfc: nand-controller@ff4b0000 {
>        compatible = "rockchip,rk3308-nfc",
>                     "rockchip,rv1108-nfc";
> -      reg = <0x0 0xff4b0000 0x0 0x4000>;
> +      reg = <0xff4b0000 0x4000>;

This is the right fix. Or you can define a parent node with cell sizes of 2.

The example is just an example and doesn't have to match exactly what
you do in the dts files.

>        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
>        clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
>        clock-names = "ahb", "nfc";
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
new file mode 100644
index 000000000000..493705a55638
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml
@@ -0,0 +1,162 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip SoCs NAND FLASH Controller (NFC)
+
+allOf:
+  - $ref: "nand-controller.yaml#"
+
+maintainers:
+  - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+  compatible:
+    oneOf:
+      - const: rockchip,px30-nfc
+      - const: rockchip,rk2928-nfc
+      - const: rockchip,rv1108-nfc
+      - items:
+          - const: rockchip,rk3036-nfc
+          - const: rockchip,rk2928-nfc
+      - items:
+          - const: rockchip,rk3308-nfc
+          - const: rockchip,rv1108-nfc
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    items:
+      - description: Bus Clock
+      - description: Module Clock
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: ahb
+      - const: nfc
+
+  assigned-clocks:
+    maxItems: 1
+
+  assigned-clock-rates:
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
+
+patternProperties:
+  "^nand@[0-7]$":
+    type: object
+    properties:
+      reg:
+        minimum: 0
+        maximum: 7
+
+      nand-ecc-mode:
+        const: hw
+
+      nand-ecc-step-size:
+        const: 1024
+
+      nand-ecc-strength:
+        enum: [16, 24, 40, 60, 70]
+        description:
+          The ECC configurations that can be supported are as follows.
+            NFC v600 ECC 16, 24, 40, 60
+              RK2928, RK3066, RK3188
+
+            NFC v622 ECC 16, 24, 40, 60
+              RK3036, RK3128
+
+            NFC v800 ECC 16
+              RK3308, RV1108
+
+            NFC v900 ECC 16, 40, 60, 70
+              RK3326, PX30
+
+      nand-bus-width:
+        const: 8
+
+      rockchip,boot-blks:
+        minimum: 2
+        default: 16
+        allOf:
+        - $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          The NFC driver need this information to select ECC
+          algorithms supported by the boot ROM.
+          Only used in combination with 'nand-is-boot-medium'.
+
+      rockchip,boot-ecc-strength:
+        enum: [16, 24, 40, 60, 70]
+        allOf:
+        - $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          If specified it indicates that a different BCH/ECC setting is
+          supported by the boot ROM.
+            NFC v600 ECC 16, 24
+              RK2928, RK3066, RK3188
+
+            NFC v622 ECC 16, 24, 40, 60
+              RK3036, RK3128
+
+            NFC v800 ECC 16
+              RK3308, RV1108
+
+            NFC v900 ECC 16, 70
+              RK3326, PX30
+
+          Only used in combination with 'nand-is-boot-medium'.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/rk3308-cru.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    nfc: nand-controller@ff4b0000 {
+      compatible = "rockchip,rk3308-nfc",
+                   "rockchip,rv1108-nfc";
+      reg = <0x0 0xff4b0000 0x0 0x4000>;
+      interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+      clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+      clock-names = "ahb", "nfc";
+      assigned-clocks = <&clks SCLK_NANDC>;
+      assigned-clock-rates = <150000000>;
+
+      pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
+                   &flash_rdn &flash_rdy &flash_wrn>;
+      pinctrl-names = "default";
+
+      #address-cells = <1>;
+      #size-cells = <0>;
+
+      nand@0 {
+        reg = <0>;
+        label = "rk-nand";
+        nand-bus-width = <8>;
+        nand-ecc-mode = "hw";
+        nand-ecc-step-size = <1024>;
+        nand-ecc-strength = <16>;
+        nand-is-boot-medium;
+        rockchip,boot-blks = <8>;
+        rockchip,boot-ecc-strength = <16>;
+      };
+    };
+
+...