From patchwork Fri Jun 19 16:18:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 1313128 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=SkISpUha; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49pPBz6Dp7zB47p for ; Sat, 20 Jun 2020 02:19:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391043AbgFSQS3 (ORCPT ); Fri, 19 Jun 2020 12:18:29 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:49760 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394544AbgFSQS1 (ORCPT ); Fri, 19 Jun 2020 12:18:27 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05JGIKMJ074940; Fri, 19 Jun 2020 11:18:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1592583501; bh=MNtLCC3jo0qsYA6CsD8IloTK9BFBqvtCUzI8Vo+wZJw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SkISpUhaiviXAy2EMHpRtFQ9lJFGPZe7hsrsSIhLszYE/8+JK0iuIJspUxYym5az7 Avqwe3NkqYu66ZNhox/RqGhhse4fUYMwo6oMky8RVCo2EleWSfqMr2W973GKcKrKft pjLOKj8dXBorM9KH8G5jB1cCq+iDrlQ+Dk0nSvGE= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05JGIKl4046445; Fri, 19 Jun 2020 11:18:20 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 19 Jun 2020 11:18:20 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 19 Jun 2020 11:18:20 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05JGIKFd090793; Fri, 19 Jun 2020 11:18:20 -0500 From: Dan Murphy To: , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v9 1/5] dt-bindings: net: Add tx and rx internal delays Date: Fri, 19 Jun 2020 11:18:09 -0500 Message-ID: <20200619161813.2716-2-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200619161813.2716-1-dmurphy@ti.com> References: <20200619161813.2716-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org tx-internal-delays and rx-internal-delays are a common setting for RGMII capable devices. These properties are used when the phy-mode or phy-controller is set to rgmii-id, rgmii-rxid or rgmii-txid. These modes indicate to the controller that the PHY will add the internal delay for the connection. Signed-off-by: Dan Murphy --- .../devicetree/bindings/net/ethernet-phy.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 9b1f1147ca36..7d8265eb49d6 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -162,6 +162,19 @@ properties: description: Specifies a reference to a node representing a SFP cage. + + rx-internal-delay-ps: + description: | + RGMII Receive PHY Clock Delay defined in pico seconds. This is used for + PHY's that have configurable RX internal delays. If this property is + present then the PHY applies the RX delay. + + tx-internal-delay-ps: + description: | + RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for + PHY's that have configurable TX internal delays. If this property is + present then the PHY applies the TX delay. + required: - reg