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[02/38] dt-bindings: memory: nvidia: Mark memory controller as interconnect provider

Message ID 20200612141903.2391044-3-thierry.reding@gmail.com
State Changes Requested, archived
Headers show
Series dt-bindings: json-schema conversions and cleanups | expand

Checks

Context Check Description
robh/checkpatch success
robh/dt-meta-schema success

Commit Message

Thierry Reding June 12, 2020, 2:18 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../memory-controllers/nvidia,tegra186-mc.yaml         | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
index 611bda38d187..581572fe3077 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
@@ -38,6 +38,16 @@  properties:
   interrupts:
     maxItems: 1
 
+  "#interconnect-cells":
+    const: 1
+    description:
+      Each interconnect node for the memory controller takes a phandle to the
+      memory controller and a single cell as the specifier, identifying the
+      memory client by its ID.
+
+      For a list of valid IDs, see dt-bindings/memory/tegra186-mc.h and
+      dt-bindings/memory/tegra194-mc.h.
+
   "#address-cells":
     const: 2