From patchwork Mon Mar 30 11:35:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Ratiu X-Patchwork-Id: 1263893 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=collabora.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48rVkH64xWz9sSG for ; Mon, 30 Mar 2020 22:35:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729808AbgC3Le6 (ORCPT ); Mon, 30 Mar 2020 07:34:58 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:59094 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729880AbgC3Le5 (ORCPT ); Mon, 30 Mar 2020 07:34:57 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: aratiu) with ESMTPSA id 81D902923C5 From: Adrian Ratiu To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, kernel@collabora.com, Andrzej Hajda , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Rob Herring , Neil Armstrong , Sjoerd Simons , Martyn Welch Subject: [PATCH v5 5/5] dt-bindings: display: add i.MX6 MIPI DSI host controller doc Date: Mon, 30 Mar 2020 14:35:42 +0300 Message-Id: <20200330113542.181752-6-adrian.ratiu@collabora.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200330113542.181752-1-adrian.ratiu@collabora.com> References: <20200330113542.181752-1-adrian.ratiu@collabora.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This provides an example DT binding for the MIPI DSI host controller present on the i.MX6 SoC based on Synopsis DesignWare v1.01 IP. Cc: Rob Herring Cc: Neil Armstrong Cc: devicetree@vger.kernel.org Signed-off-by: Sjoerd Simons Signed-off-by: Martyn Welch Signed-off-by: Adrian Ratiu --- Changes since v4: - Fixed yaml binding to pass `make dt_binding_check dtbs_check` and addressed received binding feedback (Rob) Changes since v3: - Added commit message (Neil) - Converted to yaml format (Neil) - Minor dt node + driver fixes (Rob) - Added small panel example to the host controller binding Changes since v2: - Fixed commit tags (Emil) --- .../display/imx/fsl,mipi-dsi-imx6.yaml | 134 ++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml diff --git a/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml new file mode 100644 index 000000000000..59146df11510 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,mipi-dsi-imx6.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6 DW MIPI DSI Host Controller + +maintainers: + - Adrian Ratiu + +description: | + The i.MX6 DSI host controller is a Synopsys DesignWare MIPI DSI v1.01 + IP block with a companion PHY IP. + + These DT bindings follow the Synopsys DW MIPI DSI bindings defined in + Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt with + the following device-specific properties. + +properties: + compatible: + items: + - const: fsl,imx6q-mipi-dsi + - const: snps,dw-mipi-dsi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Module Clock + - description: DSI bus clock + + clock-names: + items: + - const: ref + - const: pclk + + fsl,gpr: + description: Phandle to the iomuxc-gpr region containing the multiplexer control register. + $ref: /schemas/types.yaml#/definitions/phandle + + ports: + type: object + description: | + A node containing DSI input & output port nodes with endpoint + definitions as documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + Documentation/devicetree/bindings/graph.txt + properties: + port@0: + type: object + description: + DSI input port node, connected to the ltdc rgb output port. + + port@1: + type: object + description: + DSI output port node, connected to a panel or a bridge input port" + +patternProperties: + "^panel@[0-3]$": + type: object + description: | + A node containing the panel or bridge description as documented in + Documentation/devicetree/bindings/display/mipi-dsi-bus.txt + properties: + port: + type: object + description: + Panel or bridge port node, connected to the DSI output port (port@1) + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + - interrupts + - clocks + - clock-names + - ports + +additionalProperties: false + +examples: + - |+ + #include + #include + #include + + dsi: dsi@21e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0x021e0000 0x4000>; + interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; + fsl,gpr = <&gpr>; + clocks = <&clks IMX6QDL_CLK_MIPI_CORE_CFG>, + <&clks IMX6QDL_CLK_MIPI_IPG>; + clock-names = "ref", "pclk"; + + ports { + port@1 { + reg = <1>; + dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + panel@0 { + compatible = "sharp,ls032b3sx01"; + reg = <0>; + reset-gpios = <&gpio6 8 GPIO_ACTIVE_LOW>; + ports { + port@0 { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + }; + }; + +...