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[1/2] dt-bindings: phy: intel: Add documentation for Keem Bay eMMC PHY

Message ID 20200316103726.16339-2-wan.ahmad.zainie.wan.mohamad@intel.com
State Changes Requested, archived
Headers show
Series phy: intel: Add Keem Bay eMMC PHY support | expand

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Commit Message

Wan Ahmad Zainie March 16, 2020, 10:37 a.m. UTC 
Document Intel Keem Bay eMMC PHY DT bindings.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
---
 .../bindings/phy/intel,keembay-emmc-phy.yaml  | 57 +++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml

Comments

Kishon Vijay Abraham I March 20, 2020, 5:58 a.m. UTC | #1 
Hi,

On 3/16/2020 4:07 PM, Wan Ahmad Zainie wrote:
> Document Intel Keem Bay eMMC PHY DT bindings.
> 
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>

Need Rob's Ack on this patch.

Thanks
Kishon
> ---
>  .../bindings/phy/intel,keembay-emmc-phy.yaml  | 57 +++++++++++++++++++
>  1 file changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> new file mode 100644
> index 000000000000..af1d62fc8323
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +# Copyright 2020 Intel Corporation
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-phy.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Intel Keem Bay eMMC PHY
> +
> +maintainers:
> +  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - intel,keembay-emmc-phy
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: emmcclk
> +
> +  intel,syscon:
> +    $ref: '/schemas/types.yaml#/definitions/phandle'
> +    description:
> +      A phandle to a syscon device used to access core/phy configuration
> +      registers.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - reg
> +  - intel,syscon
> +  - "#phy-cells"
> +
> +examples:
> +  - |
> +    mmc_phy_syscon: syscon@20290000 {
> +          compatible = "simple-mfd", "syscon";
> +          reg = <0x0 0x20290000 0x0 0x54>;
> +    };
> +
> +    emmc_phy: mmc_phy@20290000 {
> +          compatible = "intel,keembay-emmc-phy";
> +          reg = <0x0 0x20290000 0x0 0x54>;
> +          clocks = <&mmc>;
> +          clock-names = "emmcclk";
> +          intel,syscon = <&mmc_phy_syscon>;
> +          #phy-cells = <0>;
> +    };
>
Rob Herring (Arm) March 30, 2020, 8:23 p.m. UTC | #2 
On Mon, Mar 16, 2020 at 06:37:25PM +0800, Wan Ahmad Zainie wrote:
> Document Intel Keem Bay eMMC PHY DT bindings.
> 
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> ---
>  .../bindings/phy/intel,keembay-emmc-phy.yaml  | 57 +++++++++++++++++++
>  1 file changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> 
> diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> new file mode 100644
> index 000000000000..af1d62fc8323
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: GPL-2.0-only

Dual license new bindings:

(GPL-2.0-only OR BSD-2-Clause)

> +# Copyright 2020 Intel Corporation
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-phy.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Intel Keem Bay eMMC PHY
> +
> +maintainers:
> +  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - intel,keembay-emmc-phy
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: emmcclk
> +
> +  intel,syscon:
> +    $ref: '/schemas/types.yaml#/definitions/phandle'

Make this binding  a child of the syscon and get rid of this.

> +    description:
> +      A phandle to a syscon device used to access core/phy configuration
> +      registers.
> +
> +  "#phy-cells":
> +    const: 0
> +
> +required:
> +  - compatible
> +  - reg
> +  - intel,syscon
> +  - "#phy-cells"
> +
> +examples:
> +  - |
> +    mmc_phy_syscon: syscon@20290000 {
> +          compatible = "simple-mfd", "syscon";
> +          reg = <0x0 0x20290000 0x0 0x54>;
> +    };
> +
> +    emmc_phy: mmc_phy@20290000 {

phy@...

> +          compatible = "intel,keembay-emmc-phy";
> +          reg = <0x0 0x20290000 0x0 0x54>;

Here you have overlapping register regions. Don't do that.

Given they are the same size, why do you need the syscon at all?

> +          clocks = <&mmc>;
> +          clock-names = "emmcclk";
> +          intel,syscon = <&mmc_phy_syscon>;
> +          #phy-cells = <0>;
> +    };
> -- 
> 2.17.1
>
Wan Ahmad Zainie April 29, 2020, 12:58 a.m. UTC | #3 
> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Tuesday, March 31, 2020 4:23 AM
> To: Wan Mohamad, Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@intel.com>
> Cc: kishon@ti.com; mark.rutland@arm.com; linux-kernel@vger.kernel.org;
> devicetree@vger.kernel.org
> Subject: Re: [PATCH 1/2] dt-bindings: phy: intel: Add documentation for
> Keem Bay eMMC PHY
> 
> On Mon, Mar 16, 2020 at 06:37:25PM +0800, Wan Ahmad Zainie wrote:
> > Document Intel Keem Bay eMMC PHY DT bindings.
> >
> > Signed-off-by: Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@intel.com>
> > ---
> >  .../bindings/phy/intel,keembay-emmc-phy.yaml  | 57
> +++++++++++++++++++
> >  1 file changed, 57 insertions(+)
> >  create mode 100644
> Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-
> emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-
> emmc-phy.yaml
> > new file mode 100644
> > index 000000000000..af1d62fc8323
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-
> phy.yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> 
> Dual license new bindings:
> 
> (GPL-2.0-only OR BSD-2-Clause)

Will change in v2.

> 
> > +# Copyright 2020 Intel Corporation
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-
> phy.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Intel Keem Bay eMMC PHY
> > +
> > +maintainers:
> > +  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - intel,keembay-emmc-phy
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    items:
> > +      - const: emmcclk
> > +
> > +  intel,syscon:
> > +    $ref: '/schemas/types.yaml#/definitions/phandle'
> 
> Make this binding  a child of the syscon and get rid of this.
> 
> > +    description:
> > +      A phandle to a syscon device used to access core/phy configuration
> > +      registers.
> > +
> > +  "#phy-cells":
> > +    const: 0
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - intel,syscon
> > +  - "#phy-cells"
> > +
> > +examples:
> > +  - |
> > +    mmc_phy_syscon: syscon@20290000 {
> > +          compatible = "simple-mfd", "syscon";
> > +          reg = <0x0 0x20290000 0x0 0x54>;
> > +    };
> > +
> > +    emmc_phy: mmc_phy@20290000 {
> 
> phy@...

Will change in v2.

> 
> > +          compatible = "intel,keembay-emmc-phy";
> > +          reg = <0x0 0x20290000 0x0 0x54>;
> 
> Here you have overlapping register regions. Don't do that.
> 
> Given they are the same size, why do you need the syscon at all?

In v2, the driver will use regmap_mmio. With that, can remove
intel,syscon. I will send out once reviewed internally.

> 
> > +          clocks = <&mmc>;
> > +          clock-names = "emmcclk";
> > +          intel,syscon = <&mmc_phy_syscon>;
> > +          #phy-cells = <0>;
> > +    };
> > --
> > 2.17.1
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
new file mode 100644
index 000000000000..af1d62fc8323
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
@@ -0,0 +1,57 @@ 
+# SPDX-License-Identifier: GPL-2.0-only
+# Copyright 2020 Intel Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-phy.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Intel Keem Bay eMMC PHY
+
+maintainers:
+  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
+
+properties:
+  compatible:
+    enum:
+      - intel,keembay-emmc-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: emmcclk
+
+  intel,syscon:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description:
+      A phandle to a syscon device used to access core/phy configuration
+      registers.
+
+  "#phy-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - intel,syscon
+  - "#phy-cells"
+
+examples:
+  - |
+    mmc_phy_syscon: syscon@20290000 {
+          compatible = "simple-mfd", "syscon";
+          reg = <0x0 0x20290000 0x0 0x54>;
+    };
+
+    emmc_phy: mmc_phy@20290000 {
+          compatible = "intel,keembay-emmc-phy";
+          reg = <0x0 0x20290000 0x0 0x54>;
+          clocks = <&mmc>;
+          clock-names = "emmcclk";
+          intel,syscon = <&mmc_phy_syscon>;
+          #phy-cells = <0>;
+    };