From patchwork Wed Feb 26 18:08:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1245265 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48SP390x7Dz9sRf for ; Thu, 27 Feb 2020 05:09:57 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727317AbgBZSJw (ORCPT ); Wed, 26 Feb 2020 13:09:52 -0500 Received: from foss.arm.com ([217.140.110.172]:40528 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727265AbgBZSJ1 (ORCPT ); Wed, 26 Feb 2020 13:09:27 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3877F30E; Wed, 26 Feb 2020 10:09:27 -0800 (PST) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.197.25]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A464F3F881; Wed, 26 Feb 2020 10:09:25 -0800 (PST) From: Andre Przywara To: Rob Herring , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Robert Richter , soc@kernel.org, Jon Loeliger , Mark Langsdorf , Eric Auger , Will Deacon , Catalin Marinas Subject: [PATCH 08/13] dt-bindings: phy: Convert Calxeda ComboPHY binding to json-schema Date: Wed, 26 Feb 2020 18:08:56 +0000 Message-Id: <20200226180901.89940-9-andre.przywara@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200226180901.89940-1-andre.przywara@arm.com> References: <20200226180901.89940-1-andre.przywara@arm.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Calxeda ComboPHY binding to DT schema format using json-schema. There is no driver in the Linux kernel matching the compatible string, but the nodes are parsed by the SATA driver, which links to them using its port-phys property. Signed-off-by: Andre Przywara --- .../bindings/phy/calxeda-combophy.txt | 17 ------- .../bindings/phy/calxeda-combophy.yaml | 47 +++++++++++++++++++ 2 files changed, 47 insertions(+), 17 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/calxeda-combophy.txt create mode 100644 Documentation/devicetree/bindings/phy/calxeda-combophy.yaml diff --git a/Documentation/devicetree/bindings/phy/calxeda-combophy.txt b/Documentation/devicetree/bindings/phy/calxeda-combophy.txt deleted file mode 100644 index 6622bdb2e8bc..000000000000 --- a/Documentation/devicetree/bindings/phy/calxeda-combophy.txt +++ /dev/null @@ -1,17 +0,0 @@ -Calxeda Highbank Combination Phys for SATA - -Properties: -- compatible : Should be "calxeda,hb-combophy" -- #phy-cells: Should be 1. -- reg : Address and size for Combination Phy registers. -- phydev: device ID for programming the combophy. - -Example: - - combophy5: combo-phy@fff5d000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff5d000 0x1000>; - phydev = <31>; - }; - diff --git a/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml b/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml new file mode 100644 index 000000000000..2ef68b95fae1 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Calxeda Highbank Combination PHYs binding for SATA + +description: | + The Calxeda Combination PHYs connect the SoC to the internal fabric + and to SATA connectors. The PHYs support multiple protocols (SATA, + SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC + controller). + Programming the PHYs is typically handled by those device drivers, + not by a dedicated PHY driver. + +maintainers: + - Andre Przywara + +properties: + compatible: + const: calxeda,hb-combophy + + '#phy-cells': + const: 1 + + reg: + maxItems: 1 + + phydev: + description: device ID for programming the combophy. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - phydev + - '#phy-cells' + +examples: + - | + combophy5: combo-phy@fff5d000 { + compatible = "calxeda,hb-combophy"; + #phy-cells = <1>; + reg = <0xfff5d000 0x1000>; + phydev = <31>; + };