From patchwork Sun Sep 15 06:50:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Louis Kuo X-Patchwork-Id: 1162429 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46WKkk64Lgz9sP7 for ; Sun, 15 Sep 2019 16:50:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725788AbfIOGuU (ORCPT ); Sun, 15 Sep 2019 02:50:20 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:62867 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726216AbfIOGuU (ORCPT ); Sun, 15 Sep 2019 02:50:20 -0400 X-UUID: a6b36d9bc5f84be480cbd834b0f87d01-20190915 X-UUID: a6b36d9bc5f84be480cbd834b0f87d01-20190915 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1755133184; Sun, 15 Sep 2019 14:50:09 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 15 Sep 2019 14:50:07 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sun, 15 Sep 2019 14:50:07 +0800 From: Louis Kuo To: , , , , , CC: , , , , , , , , , , , , , , Subject: [RFC PATCH V4 3/4] dt-bindings: mt8183: Add sensor interface dt-bindings Date: Sun, 15 Sep 2019 14:50:03 +0800 Message-ID: <20190915065004.20257-4-louis.kuo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190915065004.20257-1-louis.kuo@mediatek.com> References: <20190915065004.20257-1-louis.kuo@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the DT binding documentation for the sensor interface module in Mediatek SoCs. Signed-off-by: Louis Kuo --- .../bindings/media/mediatek-seninf.txt | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt new file mode 100644 index 000000000000..bf2eb801cb47 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt @@ -0,0 +1,30 @@ +* Mediatek seninf MIPI-CSI2 host driver + +Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support a widely adopted, +simple, high-speed protocol primarily intended for point-to-point image and video +transmission between cameras and host devices. + +Required properties: + - compatible: "mediatek,mt8183-seninf" + - reg: Must contain an entry for each entry in reg-names. + - reg-names: Must include the following entries: + "base_reg": seninf registers base + "rx_reg": Rx analog registers base + - interrupts: interrupt number to the cpu. + - clocks : clock name from clock manager + - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF. + It is the clocks of seninf + +Example: + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183-seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11C80000 0 0x6000>; + reg-names = "base_reg", "rx_reg"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = <&camsys CLK_CAM_SENINF>, + <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF"; + } +