| Message ID | 20190905105601.27034-2-jank@cadence.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | media: Add support for Cadence CSI2RX version 2.1 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
On Thu, 5 Sep 2019 11:55:59 +0100, Jan Kotas wrote: > This patch adds a DT bindings documentation for > Cadence CSI2RX v1.3 and v2.1 controllers. > > Signed-off-by: Jan Kotas <jank@cadence.com> > --- > Documentation/devicetree/bindings/media/cdns,csi2rx.txt | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt index 6b02a0657..df828e4e4 100644 --- a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt +++ b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt @@ -5,7 +5,10 @@ The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI lanes in input, and 4 different pixel streams in output. Required properties: - - compatible: must be set to "cdns,csi2rx" and an SoC-specific compatible + - compatible: must be set to: + * "cdns,csi2rx" or "cdns,csi2rx-1.3" for version 1.3 of the controller, + * "cdns,csi2rx-2.1" for v2.1, + and an SoC-specific compatible - reg: base address and size of the memory mapped region - clocks: phandles to the clocks driving the controller - clock-names: must contain:
This patch adds a DT bindings documentation for Cadence CSI2RX v1.3 and v2.1 controllers. Signed-off-by: Jan Kotas <jank@cadence.com> --- Documentation/devicetree/bindings/media/cdns,csi2rx.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)