Message ID | 20190604131516.13596-4-kishon@ti.com |
---|---|
State | RFC, archived |
Headers | show |
Series | Add PCIe support to TI's J721E SoC | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success |
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt index cbd16519ae13..afebfec102af 100644 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt @@ -5,6 +5,7 @@ host-generic-pci.txt. Required properties: - compatible: Should contain "cdns,cdns-pcie-host" to identify the IP used. + Should contain "ti,j721e-cdns-pcie-host" for TI platforms. - reg: Should contain the controller register base address, PCIe configuration window base address, and AXI interface region base address respectively. - reg-names: Must be "reg", "cfg" and "mem" respectively.
Update DT bindings for Cadence PCIe host controller with TI specific compatible. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt | 1 + 1 file changed, 1 insertion(+)