From patchwork Mon Mar 25 12:47:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 1064274 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44SYw66lH7z9sST for ; Mon, 25 Mar 2019 23:48:22 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731134AbfCYMsR (ORCPT ); Mon, 25 Mar 2019 08:48:17 -0400 Received: from relay9-d.mail.gandi.net ([217.70.183.199]:42995 "EHLO relay9-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730858AbfCYMsR (ORCPT ); Mon, 25 Mar 2019 08:48:17 -0400 X-Originating-IP: 109.213.38.144 Received: from localhost (alyon-652-1-47-144.w109-213.abo.wanadoo.fr [109.213.38.144]) (Authenticated sender: gregory.clement@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 771A4FF802; Mon, 25 Mar 2019 12:48:13 +0000 (UTC) From: Gregory CLEMENT To: Stephen Boyd , Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Maxime Chevallier Subject: [PATCH v4 1/6] dt-bindings: ap806: add the cluster clock node in the syscon file Date: Mon, 25 Mar 2019 13:47:58 +0100 Message-Id: <20190325124803.28904-2-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190325124803.28904-1-gregory.clement@bootlin.com> References: <20190325124803.28904-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the device tree binding for the cluster clock controllers found in the Armada 7K/8K SoCs. Signed-off-by: Gregory CLEMENT --- .../arm/marvell/ap806-system-controller.txt | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 7b8b8eb0191f..ceeba18b4ac3 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -143,3 +143,28 @@ ap_syscon1: system-controller@6f8000 { #thermal-sensor-cells = <1>; }; }; + +Cluster clocks: +--------------- + +Device Tree Clock bindings for cluster clock of AP806 Marvell. Each +cluster contain up to 2 CPUs running at the same frequency. + +Required properties: +- compatible: must be "marvell,ap806-cpu-clock"; +- #clock-cells : should be set to 1. +- clocks : shall be the input parents clock phandle for the clock. + +Optional property: + - reg: register range associated the cluser clocks + +ap_syscon1: system-controller@6f8000 { + compatible = "syscon", "simple-mfd"; + reg = <0x6f8000 0x1000>; + + cpu_clk: clock-cpu { + compatible = "marvell,ap806-cpu-clock"; + clocks = <&ap_clk 0>, <&ap_clk 1>; + #clock-cells = <1>; + }; +};