From patchwork Wed Jan 30 15:50:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 1033635 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43qSjF0HvRz9s3q for ; Thu, 31 Jan 2019 02:59:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728377AbfA3P6y (ORCPT ); Wed, 30 Jan 2019 10:58:54 -0500 Received: from mslow2.mail.gandi.net ([217.70.178.242]:43942 "EHLO mslow2.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728720AbfA3P6y (ORCPT ); Wed, 30 Jan 2019 10:58:54 -0500 Received: from relay9-d.mail.gandi.net (unknown [217.70.183.199]) by mslow2.mail.gandi.net (Postfix) with ESMTP id 2C9173A663B; Wed, 30 Jan 2019 16:50:30 +0100 (CET) X-Originating-IP: 90.88.147.226 Received: from localhost.localdomain (aaubervilliers-681-1-27-226.w90-88.abo.wanadoo.fr [90.88.147.226]) (Authenticated sender: paul.kocialkowski@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 8D4E0FF811; Wed, 30 Jan 2019 15:50:27 +0000 (UTC) From: Paul Kocialkowski To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Kishon Vijay Abraham I , Rob Herring , Mark Rutland , Paul Kocialkowski , =?utf-8?q?Myl=C3=A8ne_Josserand?= , Thomas Petazzoni Subject: [PATCH 1/3] dt-bindings: phy: Add bindings for the SMSC USB333x ULPI USB PHY Date: Wed, 30 Jan 2019 16:50:21 +0100 Message-Id: <20190130155023.4495-2-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190130155023.4495-1-paul.kocialkowski@bootlin.com> References: <20190130155023.4495-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Introduce the device-tree bindings for this ULPI USB PHY. Optional bindings that are not prefixed with the vendor may be relevant to other ULPI USB PHYs since they match generic ULPI registers. Signed-off-by: Paul Kocialkowski --- .../devicetree/bindings/phy/smsc-usb333x.txt | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/smsc-usb333x.txt diff --git a/Documentation/devicetree/bindings/phy/smsc-usb333x.txt b/Documentation/devicetree/bindings/phy/smsc-usb333x.txt new file mode 100644 index 000000000000..50d500d67b2f --- /dev/null +++ b/Documentation/devicetree/bindings/phy/smsc-usb333x.txt @@ -0,0 +1,50 @@ +Device tree bindings for SMSC USB333x ULPI USB PHY + +Required properties: +- compatible: Should be "smsc,usb333x". + +Optional properties: +- reset-gpios: GPIO to reset the PHY. +- clocks: Reference clock that feeds the PHY's PLL. +- clock-names: Should be "refclk" for the reference clock. +- extvbus-passthru: Enable EXTVBUS signal pass-through to assert the VbusValid + signal internally. This is useful when no VBUS line is connected to the PHY. +- auto-resume: Enable automatic transmission resume (in host mode). +- chrg-vbus: Enable internal VBUS pull-up to 3.3 V during OTG SRP. +- dischrg-vbus: Enable internal VBUS pull-down during OTG SRP. +- id-pull-up: Enable internal ID pull-up tp 3.3 V. +- smsc,varisense: Squelch detector threshold register field value, as described + in the datasheet. +- smsc,phyboost: Output voltage change register field value, as described in the + datasheet. + +Refer to phy/phy-bindings.txt for the generic PHY binding properties. +Refer to usb/ulpi.txt for the parent ULPI bus binding required for this PHY. + +Example: + +&usb0 { + compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; + clocks = <&clkc 28>; + interrupt-parent = <&intc>; + interrupts = <0 21 4>; + reg = <0xe0002000 0x1000>; + dr_mode = "peripheral"; + phys = <&usb_phy0>; + phy-names = "usb-phy"; + phy_type = "ulpi"; + + ulpi { + usb_phy0: usb-phy0 { + #phy-cells = <0>; + compatible = "smsc,usb333x"; + reset-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + clocks = <&usb_phy_clk>; + clock-names = "refclk"; + smsc,varisense = <1>; + smsc,phyboost = <5>; + extvbus-passthru; + chrg-vbus; + }; + }; +};