From patchwork Mon Sep 3 09:33:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 965326 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 423lCS3Fwrz9s4Z for ; Mon, 3 Sep 2018 19:33:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727611AbeICNxN (ORCPT ); Mon, 3 Sep 2018 09:53:13 -0400 Received: from mail.bootlin.com ([62.4.15.54]:54613 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727608AbeICNxN (ORCPT ); Mon, 3 Sep 2018 09:53:13 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 7DED522A3E; Mon, 3 Sep 2018 11:33:54 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (AAubervilliers-681-1-92-107.w90-88.abo.wanadoo.fr [90.88.33.107]) by mail.bootlin.com (Postfix) with ESMTPSA id A4D3C22A46; Mon, 3 Sep 2018 11:33:26 +0200 (CEST) From: Quentin Schulz To: alexandre.belloni@bootlin.com, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, davem@davemloft.net, kishon@ti.com, andrew@lunn.ch, f.fainelli@gmail.com Cc: allan.nielsen@microchip.com, linux-mips@linux-mips.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, thomas.petazzoni@bootlin.com, Quentin Schulz Subject: [PATCH v2 09/11] dt-bindings: add constants for Microsemi Ocelot SerDes driver Date: Mon, 3 Sep 2018 11:33:06 +0200 Message-Id: <20180903093308.24366-10-quentin.schulz@bootlin.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180903093308.24366-1-quentin.schulz@bootlin.com> References: <20180903093308.24366-1-quentin.schulz@bootlin.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Microsemi Ocelot has multiple SerDes and requires that the SerDes be muxed accordingly to the hardware representation. Let's add a constant for each SerDes available in the Microsemi Ocelot. Signed-off-by: Quentin Schulz --- include/dt-bindings/phy/phy-ocelot-serdes.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/dt-bindings/phy/phy-ocelot-serdes.h diff --git a/include/dt-bindings/phy/phy-ocelot-serdes.h b/include/dt-bindings/phy/phy-ocelot-serdes.h new file mode 100644 index 000000000000..cf111baa87c8 --- /dev/null +++ b/include/dt-bindings/phy/phy-ocelot-serdes.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* Copyright (c) 2018 Microsemi Corporation */ +#ifndef __PHY_OCELOT_SERDES_H__ +#define __PHY_OCELOT_SERDES_H__ + +#define SERDES1G_0 0 +#define SERDES1G_1 1 +#define SERDES1G_2 2 +#define SERDES1G_3 3 +#define SERDES1G_4 4 +#define SERDES1G_5 5 +#define SERDES1G_MAX 6 +#define SERDES6G_0 SERDES1G_MAX +#define SERDES6G_1 (SERDES1G_MAX + 1) +#define SERDES6G_2 (SERDES1G_MAX + 2) +#define SERDES6G_MAX (SERDES1G_MAX + 3) +#define SERDES_MAX (SERDES1G_MAX + SERDES6G_MAX) + +#endif