From patchwork Fri Jul 14 06:42:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 788140 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3x838y1vprz9s78 for ; Fri, 14 Jul 2017 16:45:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751828AbdGNGpG (ORCPT ); Fri, 14 Jul 2017 02:45:06 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:58804 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752902AbdGNGnO (ORCPT ); Fri, 14 Jul 2017 02:43:14 -0400 Received: by wens.csie.org (Postfix, from userid 1000) id 254E15FF17; Fri, 14 Jul 2017 14:43:08 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Ulf Hansson , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 07/11] mmc: sunxi: Add support for A83T eMMC (MMC2) Date: Fri, 14 Jul 2017 14:42:58 +0800 Message-Id: <20170714064302.20383-8-wens@csie.org> X-Mailer: git-send-email 2.13.2 In-Reply-To: <20170714064302.20383-1-wens@csie.org> References: <20170714064302.20383-1-wens@csie.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly different. It supports a wider 8-bit bus, has a dedicated controllable reset pin for eMMC, and a "new timing mode" which is supposed to deliver better signals and thus better performance. Add a compatible for this one to use the new timing mode not found in the other controllers. Signed-off-by: Chen-Yu Tsai Acked-by: Rob Herring --- Documentation/devicetree/bindings/mmc/sunxi-mmc.txt | 1 + drivers/mmc/host/sunxi-mmc.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt b/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt index 7d53a799f140..63b57e2a10fb 100644 --- a/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt +++ b/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt @@ -12,6 +12,7 @@ Required properties: * "allwinner,sun4i-a10-mmc" * "allwinner,sun5i-a13-mmc" * "allwinner,sun7i-a20-mmc" + * "allwinner,sun8i-a83t-emmc" * "allwinner,sun9i-a80-mmc" * "allwinner,sun50i-a64-emmc" * "allwinner,sun50i-a64-mmc" diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 7b6f5f49620e..e70065dbd50e 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1113,6 +1113,13 @@ static const struct sunxi_mmc_cfg sun7i_a20_cfg = { .can_calibrate = false, }; +static const struct sunxi_mmc_cfg sun8i_a83t_emmc_cfg = { + .idma_des_size_bits = 16, + .clk_delays = sunxi_mmc_clk_delays, + .can_calibrate = false, + .has_new_timings = true, +}; + static const struct sunxi_mmc_cfg sun9i_a80_cfg = { .idma_des_size_bits = 16, .clk_delays = sun9i_mmc_clk_delays, @@ -1137,6 +1144,7 @@ static const struct of_device_id sunxi_mmc_of_match[] = { { .compatible = "allwinner,sun4i-a10-mmc", .data = &sun4i_a10_cfg }, { .compatible = "allwinner,sun5i-a13-mmc", .data = &sun5i_a13_cfg }, { .compatible = "allwinner,sun7i-a20-mmc", .data = &sun7i_a20_cfg }, + { .compatible = "allwinner,sun8i-a83t-emmc", .data = &sun8i_a83t_emmc_cfg }, { .compatible = "allwinner,sun9i-a80-mmc", .data = &sun9i_a80_cfg }, { .compatible = "allwinner,sun50i-a64-mmc", .data = &sun50i_a64_cfg }, { .compatible = "allwinner,sun50i-a64-emmc", .data = &sun50i_a64_emmc_cfg },