From patchwork Tue Mar 21 20:48:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rick Altherr X-Patchwork-Id: 741743 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vnlK12vfqz9s7R for ; Wed, 22 Mar 2017 07:48:37 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="dMgrnN5B"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933733AbdCUUsf (ORCPT ); Tue, 21 Mar 2017 16:48:35 -0400 Received: from mail-pf0-f179.google.com ([209.85.192.179]:36403 "EHLO mail-pf0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933682AbdCUUsd (ORCPT ); Tue, 21 Mar 2017 16:48:33 -0400 Received: by mail-pf0-f179.google.com with SMTP id o126so84658934pfb.3 for ; Tue, 21 Mar 2017 13:48:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=9m8mlVGrWSaULzYhiFwm4OlGVeWNloaM6yi8eEM8FE8=; b=dMgrnN5BqjJm8gPuZUlSv2Bo1nDqlDoZuixLyZkZ3buXNXZSCfYncQOuDT1CBhUJaZ flacpAxqpiLdMTvd6cEW47SSYhX9s4UmQ3FpJi6aU1C+hHrzkC4DbkKfW3HIqybRvMIZ jmPRtLdw1Xl4l5TpU0bj15TiOSB7CdngzDP5QvrgxGswlQ/lUzESC4mnCO84Ibd2vQlL J1pw6WmjpFWKxuOx/ymMWjhYHm71hMlw5ZwmFQBx+C5nfCMkfiAC5mAn4At3kItm003Z 9vvHeX27u2+Y8aui90HOvVOy2Krib5acV7KGMcoQitRXUYkutLAmjOQxPRk+7RgYfXot sjfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=9m8mlVGrWSaULzYhiFwm4OlGVeWNloaM6yi8eEM8FE8=; b=OfV/bSu6HneOC3fs4ym0Eh9qCdZlYISPSAM3E80LrbbXWED+TevTZzBlj8qWBH/5yG XlBvkXSPYujNhwiiQpeksRaupuDRsOAc1CXroJcUffnuad3G0zeQXDs7/gX1BstsvRvS BBgT883a9MIfar8Tgvr+kjJRXro9F2qUa0tIqtJhZrmebIloLHsSdS6s2ixWQMUzdf73 FPcKOzTn8WkUmXcHzAjN6yBN+3YI+zhfaHzzn8ojM9UO1+NQbmFTXf5e9rMp/ZeotiGy wttfLbQ0UZDs87nE7eZj8SboLshqX+2YlLEB5yGQjQzs3PXusNIkTh+swB3Q+ynS39sA HkXg== X-Gm-Message-State: AFeK/H0w8rsFlHGc3XUqjmhx1qGy7UqIbgAQJtfM7VcUT1NOy/BYVP7hZJwwxPuVwYH7UeRK X-Received: by 10.84.210.167 with SMTP id a36mr50702712pli.40.1490129311937; Tue, 21 Mar 2017 13:48:31 -0700 (PDT) Received: from raltherr-linux.svl.corp.google.com ([100.123.242.49]) by smtp.gmail.com with ESMTPSA id c22sm41622939pgn.43.2017.03.21.13.48.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Mar 2017 13:48:30 -0700 (PDT) From: Rick Altherr To: openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-iio@vger.kernel.org, Hartmut Knaack , Rob Herring , Lars-Peter Clausen , Mark Rutland , Jonathan Cameron , Peter Meerwald-Stadler Subject: [PATCH v2 1/2] Documentation: dt-bindings: Document bindings for Aspeed AST2400/AST2500 ADC Date: Tue, 21 Mar 2017 13:48:27 -0700 Message-Id: <20170321204828.31303-1-raltherr@google.com> X-Mailer: git-send-email 2.12.1.500.gab5fba24ee-goog Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Rick Altherr Acked-by: Rob Herring --- Changes in v2: - Rewritten as an IIO ADC device .../devicetree/bindings/iio/adc/aspeed_adc.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt new file mode 100644 index 000000000000..7748c2c2ad0c --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt @@ -0,0 +1,20 @@ +Aspeed AST2400/2500 ADC + +This device is a 10-bit converter for 16 voltage channels. All inputs are +single ended. + +Required properties: +- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" +- reg: memory window mapping address and length +- clocks: Input clock used to derive the sample clock. Expected to be the + SoC's APB clock. +- #io-channel-cells: Must be set to <1> to indicate channels are selected + by index. + +Example: + adc@1e6e9000 { + compatible = "aspeed,ast2400-adc"; + reg = <0x1e6e9000 0xB0>; + clocks = <&clk_apb>; + #io-channel-cells = <1>; + };