From patchwork Thu Jul 7 19:37:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 646128 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rlnvp1qFLz9t0P for ; Fri, 8 Jul 2016 05:37:42 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751805AbcGGThi (ORCPT ); Thu, 7 Jul 2016 15:37:38 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:34536 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750985AbcGGThi (ORCPT ); Thu, 7 Jul 2016 15:37:38 -0400 Received: from swarren-lx1.nvidia.com (thunderhill.nvidia.com [216.228.112.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPSA id 4D7371C03EA; Thu, 7 Jul 2016 13:37:39 -0600 (MDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.99 at avon.wwwdotorg.org From: Stephen Warren To: Thierry Reding Cc: Rob Herring , Mark Rutland , Wolfram Sang , Alexandre Courbot , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Stephen Warren Subject: [PATCH] ARM: tegra: add DT binding for Tegra186 BPMP I2C Date: Thu, 7 Jul 2016 13:37:11 -0600 Message-Id: <20160707193711.5891-1-swarren@wwwdotorg.org> X-Mailer: git-send-email 2.9.0 X-NVConfidentiality: public Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Stephen Warren In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW devices, such as the I2C controller for the power management I2C bus. Software running on other CPUs must perform IPC to the BPMP in order to execute transactions on that I2C bus. This binding describes an I2C bus that is accessed in such a fashion. Signed-off-by: Stephen Warren --- .../bindings/i2c/nvidia,tegra186-bpmp-i2c.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt new file mode 100644 index 000000000000..eb9f70723ab7 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.txt @@ -0,0 +1,35 @@ +NVIDIA Tegra186 BPMP I2C controller + +In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW +devices, such as the I2C controller for the power management I2C bus. Software +running on other CPUs must perform IPC to the BPMP in order to execute +transactions on that I2C bus. This binding describes an I2C bus that is +accessed in such a fashion. + +Required properties: +- compatible: + Array of strings. + One of: + - "nvidia,tegra186-bpmp-i2c". +- address-cells: Address cells for I2C device address. + Single-cell integer. + Must be <1>. +- size-cells: + Single-cell integer. + Must be <0>. +- nvidia,bpmp: + The phandle to the BPMP device. +- nvidia,bpmp-bus-id: + Single-cell integer. + Indicates the I2C bus number this DT node represent, as defined by the + BPMP firmware. + +Example: + + bpmp-i2c { + compatible = "nvidia,tegra186-bpmp-i2c"; + #address-cells = <1>; + #size-cells = <0>; + nvidia,bpmp = <&bpmp>; + nvidia,bpmp-bus-id = <5>; + };