From patchwork Wed Jun 22 08:25:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 639019 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rZHmC36ptz9t1F for ; Wed, 22 Jun 2016 18:28:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751394AbcFVI1s (ORCPT ); Wed, 22 Jun 2016 04:27:48 -0400 Received: from nat-hk.nvidia.com ([203.18.50.4]:32447 "EHLO hkmmgate101.nvidia.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751000AbcFVI1f (ORCPT ); Wed, 22 Jun 2016 04:27:35 -0400 Received: from hkpgpgate101.nvidia.com (Not Verified[10.18.92.9]) by hkmmgate101.nvidia.com id ; Wed, 22 Jun 2016 16:27:35 +0800 Received: from HKMAIL102.nvidia.com ([10.18.67.137]) by hkpgpgate101.nvidia.com (PGP Universal service); Wed, 22 Jun 2016 01:27:33 -0700 X-PGP-Universal: processed; by hkpgpgate101.nvidia.com on Wed, 22 Jun 2016 01:27:33 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HKMAIL102.nvidia.com (10.18.16.11) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 22 Jun 2016 08:27:32 +0000 Received: from percival.nvidia.com (172.20.13.39) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1130.7 via Frontend Transport; Wed, 22 Jun 2016 08:27:30 +0000 From: Alexandre Courbot To: Liam Girdwood , Mark Brown , Rob Herring , Mark Rutland CC: , , , Alexandre Courbot Subject: [PATCH 6/6] dt-bindings: pwm-regulator: Document enable-gpio property Date: Wed, 22 Jun 2016 17:25:58 +0900 Message-ID: <20160622082558.20935-7-acourbot@nvidia.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160622082558.20935-1-acourbot@nvidia.com> References: <20160622082558.20935-1-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add and document the enable-gpio property. Its behavior is similar to the property of the same name found in GPIO regulator and fixed regulator. Cc: devicetree@vger.kernel.org Signed-off-by: Alexandre Courbot --- Documentation/devicetree/bindings/regulator/pwm-regulator.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/regulator/pwm-regulator.txt b/Documentation/devicetree/bindings/regulator/pwm-regulator.txt index ed936f0f34f2..4f9dd27f52f5 100644 --- a/Documentation/devicetree/bindings/regulator/pwm-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/pwm-regulator.txt @@ -38,13 +38,18 @@ NB: To be clear, if voltage-table is provided, then the device will be used in Voltage Table Mode. If no voltage-table is provided, then the device will be used in Continuous Voltage Mode. +Optional properties: +-------------------- +- enable-gpio: GPIO to use to enable/disable the regulator + Any property defined as part of the core regulator binding can also be used. (See: ../regulator/regulator.txt) -Continuous Voltage Example: +Continuous Voltage With Enable GPIO Example: pwm_regulator { compatible = "pwm-regulator; pwms = <&pwm1 0 8448 0>; + enable-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>; regulator-min-microvolt = <1016000>; regulator-max-microvolt = <1114000>; regulator-name = "vdd_logic";