diff mbox

[03/24] Documentation: DT bindings: add more chip compatible strings for Tegra SOR

Message ID 20150128234937.20644.39714.stgit@dusk.lan
State New, archived
Headers show

Commit Message

Paul Walmsley Jan. 28, 2015, 11:49 p.m. UTC
Add compatible strings for the SOR IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-tegra@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 .../bindings/gpu/nvidia,tegra20-host1x.txt         |    2 ++
 1 file changed, 2 insertions(+)



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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 4c32ef0b7db8..0e828c00e7e4 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -198,6 +198,7 @@  of the following host1x client modules:
 
   Required properties:
   - compatible: "nvidia,tegra124-sor"
+    "nvidia,tegra132-sor" (not yet matched in the driver)
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.
@@ -223,6 +224,7 @@  of the following host1x client modules:
 
 - dpaux: DisplayPort AUX interface
   - compatible: "nvidia,tegra124-dpaux"
+    "nvidia,tegra132-dpaux" (not yet matched in the driver)
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.