| Message ID | 1649145062-29833-2-git-send-email-hayashi.kunihiko@socionext.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | dt-bindings: PCI: uniphier: Fix endpoint descriptions | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Tue, Apr 05, 2022 at 04:51:00PM +0900, Kunihiko Hayashi wrote: > UniPhier PCIe EP controller has 5 register mappings (dbi, dbi2, link, > config and atu), so maxItems of "reg" and "reg-names" should allow 5. Shouldn't that be 'addr_space' rather than 'config'? IIRC, 'config' is only for the host. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml > index e59059ab5be0..03f97e7c4089 100644 > --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml > @@ -28,11 +28,11 @@ properties: > versions. > For designware core version >= 4.80, it may contain ATU address space. > minItems: 2 > - maxItems: 4 > + maxItems: 5 > > reg-names: > minItems: 2 > - maxItems: 4 > + maxItems: 5 > items: > enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl] > > -- > 2.25.1 > >
Hi Rob, Thank you for pointing out. On 2022/04/07 3:14, Rob Herring wrote: > On Tue, Apr 05, 2022 at 04:51:00PM +0900, Kunihiko Hayashi wrote: >> UniPhier PCIe EP controller has 5 register mappings (dbi, dbi2, link, >> config and atu), so maxItems of "reg" and "reg-names" should allow 5. > > Shouldn't that be 'addr_space' rather than 'config'? IIRC, 'config' is > only for the host. Yes. I made a mistake in the comment. UniPhier EP controller has also "addr_space", not "config". I'll fix it next. Thank you, --- Best Regards Kunihiko Hayashi
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index e59059ab5be0..03f97e7c4089 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -28,11 +28,11 @@ properties: versions. For designware core version >= 4.80, it may contain ATU address space. minItems: 2 - maxItems: 4 + maxItems: 5 reg-names: minItems: 2 - maxItems: 4 + maxItems: 5 items: enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
UniPhier PCIe EP controller has 5 register mappings (dbi, dbi2, link, config and atu), so maxItems of "reg" and "reg-names" should allow 5. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)