From patchwork Wed Aug 5 10:52:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qii Wang X-Patchwork-Id: 1341429 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=CwMdNAXH; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BMNBX3RgZz9sTS for ; Thu, 6 Aug 2020 06:14:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726748AbgHEUOV (ORCPT ); Wed, 5 Aug 2020 16:14:21 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:57483 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726793AbgHEQX0 (ORCPT ); Wed, 5 Aug 2020 12:23:26 -0400 X-UUID: 1b958955b04a4447aec755d2b776b42c-20200805 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=rgglf6GVKnv1Jkvp64Ht2UoQ1fYb0dBQwks3oFNLEHQ=; b=CwMdNAXHypaiPgbzk0HdMEaZbUntKlPxOeopJwJQ9VZCsuS8KH1SPvpAt+UzKy0KhkGg3ov/ssOCSJVknV5TDiF11FkEsYN4UUaADFOEWqk1IIFSABa4atRhzY5kypeSUz+WpvgcEZB6wC6KYtPjU4AfHSrJzdJV7uZ7C039WG4=; X-UUID: 1b958955b04a4447aec755d2b776b42c-20200805 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 550693179; Wed, 05 Aug 2020 18:53:22 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 5 Aug 2020 18:53:18 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 5 Aug 2020 18:53:19 +0800 From: Qii Wang To: CC: , , , , , , , Subject: [PATCH v3 3/4] dt-bindings: i2c: update bindings for MT8192 SoC Date: Wed, 5 Aug 2020 18:52:21 +0800 Message-ID: <1596624742-14727-4-git-send-email-qii.wang@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1596624742-14727-1-git-send-email-qii.wang@mediatek.com> References: <1596624742-14727-1-git-send-email-qii.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a DT binding documentation for the MT8192 soc. Acked-by: Rob Herring Signed-off-by: Qii Wang --- Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt index 88b71c1..7f0194f 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt @@ -14,6 +14,7 @@ Required properties: "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629 "mediatek,mt8173-i2c": for MediaTek MT8173 "mediatek,mt8183-i2c": for MediaTek MT8183 + "mediatek,mt8192-i2c": for MediaTek MT8192 "mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516 - reg: physical base address of the controller and dma base, length of memory mapped region.