From patchwork Tue Mar 31 18:07:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?V2VpamllIEdhbyAo6auY5oOf5p2wKQ==?= X-Patchwork-Id: 1264888 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=gO/eZcWl; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48sHPs50B1z9sSN for ; Wed, 1 Apr 2020 05:08:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727390AbgCaSIc (ORCPT ); Tue, 31 Mar 2020 14:08:32 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:1679 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726199AbgCaSIc (ORCPT ); Tue, 31 Mar 2020 14:08:32 -0400 X-UUID: 174587bf37f543c0bcedc8c9f412e457-20200401 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=B2WGXD+okc3OAMherNCj95maawSKPkr+yhClbmy/cpc=; b=gO/eZcWlGlRN12xXvBy/Jx3LzDA4HGqr7peHlErgIFjkcMhPpGsJPjCoVhHnvj4P3uqMCsunbu58eLcVqadc4/813e30sCzGlcVl79yPGXmxDs/8L5SVXfoTcP0squHjpiOSrKB/zVuMnIXK4kUzZ1Pp0r7ac4NyS8sGvvkZvnI=; X-UUID: 174587bf37f543c0bcedc8c9f412e457-20200401 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 421072275; Wed, 01 Apr 2020 02:08:19 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31DR.mediatek.inc (172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 1 Apr 2020 02:08:15 +0800 Received: from mcddlt001.mediatek.inc (10.19.240.15) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 1 Apr 2020 02:08:13 +0800 From: Weijie Gao To: CC: , , , , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Matthias Brugger , Boris Brezillon , Frieder Schrempf , Greg Kroah-Hartman , Anders Roxell , Brendan Higgins , Piotr Sroka , Mason Yang , Arnd Bergmann , Rob Herring , Mark Rutland , Weijie Gao Subject: [PATCH 2/2] dt-bindings: add documentation for mt7621-nand driver Date: Wed, 1 Apr 2020 02:07:59 +0800 Message-ID: <1585678079-5999-2-git-send-email-weijie.gao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1585678079-5999-1-git-send-email-weijie.gao@mediatek.com> References: <1585678079-5999-1-git-send-email-weijie.gao@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 3384A60C0D5DDDAA02D07F0CCC8D72BA3C78905B95A6884107B1114CBA68EF0C2000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds documentation for MediaTek MT7621 NAND flash controller driver. Signed-off-by: Weijie Gao --- .../bindings/mtd/mediatek,mt7621-nfc.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml diff --git a/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml new file mode 100644 index 000000000000..1ca0c5e95e4c --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/mediatek,mt7621-nfc.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/mediatek,mt7621-nfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT7621 SoC NAND Flash Controller (NFC) DT binding + +maintainers: + - Weijie Gao + +description: | + This driver uses a single node to describe both NAND Flash controller + interface (NFI) and ECC engine for MT7621 SoC. + MT7621 supports only one chip select. + +properties: + "#address-cells": false + "#size-cells": false + + compatible: + enum: + - mediatek,mt7621-nfc + + reg: + items: + - description: Register base of NFI core + - description: Register base of ECC engine + + reg-names: + items: + - const: nfi + - const: ecc + + clocks: + items: + - description: Source clock for NFI core, fixed 125MHz + + clock-names: + items: + - const: nfi_clk + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + +examples: + - | + nficlock: nficlock { + #clock-cells = <0>; + compatible = "fixed-clock"; + + clock-frequency = <125000000>; + }; + + nand@1e003000 { + compatible = "mediatek,mt7621-nfc"; + + reg = <0x1e003000 0x800 + 0x1e003800 0x800>; + reg-names = "nfi", "ecc"; + + clocks = <&nficlock>; + clock-names = "nfi_clk"; + };