From patchwork Wed Mar 4 11:06:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Shih X-Patchwork-Id: 1248941 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=PTg3iqb2; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48XWKH0bCTz9sR4 for ; Wed, 4 Mar 2020 22:06:27 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387929AbgCDLG0 (ORCPT ); Wed, 4 Mar 2020 06:06:26 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:51624 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2387925AbgCDLG0 (ORCPT ); Wed, 4 Mar 2020 06:06:26 -0500 X-UUID: de92795c78f44d0abaa1953058caa7ee-20200304 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=THhbz1tL3bdIddSTgCLGB9wEcIKzP7y2s4qGL9MX0uI=; b=PTg3iqb2eSyGq5qaCjAAHDvTZpmLncEqkJN827RDXfWG1jaNSuGGd+8JeyDjOEw/1Xt05EXJfxf+uWJT65ts6bu1RIIn5c/BgfSQ/aow+YlVkGdtTAkFSw1KwQ2I2+PkUkKiToKun1sFVB4TDolZIbM7OVgPqnYrVTa20CH+0AM=; X-UUID: de92795c78f44d0abaa1953058caa7ee-20200304 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 417617908; Wed, 04 Mar 2020 19:06:19 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 4 Mar 2020 19:05:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 4 Mar 2020 19:06:17 +0800 From: Sam Shih To: Matthias Brugger , Rob Herring , Mark Rutland CC: , , , , Sam Shih Subject: [v3,1/2] dt-bindings: pwm: Update bindings for MT7629 SoC Date: Wed, 4 Mar 2020 19:06:12 +0800 Message-ID: <1583319973-20694-2-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1583319973-20694-1-git-send-email-sam.shih@mediatek.com> References: <1583319973-20694-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This updates bindings for MT7629 pwm controller. Signed-off-by: Sam Shih --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index 95536d83c5f2..29adff59c479 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -19,10 +19,15 @@ Required properties: - "pwm1-8": the eight per PWM clocks for mt2712 - "pwm1-6": the six per PWM clocks for mt7622 - "pwm1-5": the five per PWM clocks for mt7623 + - "pwm1" : the PWM1 clock for mt7629 - pinctrl-names: Must contain a "default" entry. - pinctrl-0: One property must exist for each entry in pinctrl-names. See pinctrl/pinctrl-bindings.txt for details of the property values. +Optional properties: +- assigned-clocks: Reference to the PWM clock entries. +- assigned-clock-parents: The phandle of the parent clock of PWM clock. + Example: pwm0: pwm@11006000 { compatible = "mediatek,mt7623-pwm";