diff mbox series

[v2,4/5] dt-bindings: display: imx: add bindings for DCSS

Message ID 1570025100-5634-5-git-send-email-laurentiu.palcu@nxp.com
State Not Applicable, archived
Headers show
Series Add support for iMX8MQ Display Controller Subsystem | expand

Checks

Context Check Description
robh/checkpatch success
robh/dt-meta-schema success

Commit Message

Laurentiu Palcu Oct. 2, 2019, 2:04 p.m. UTC
Add bindings for iMX8MQ Display Controller Subsystem.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
---
 .../bindings/display/imx/nxp,imx8mq-dcss.yaml      | 86 ++++++++++++++++++++++
 1 file changed, 86 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml

Comments

Rob Herring (Arm) Oct. 11, 2019, 2:50 p.m. UTC | #1
:u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????#????ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.?\?oۊwb??v+)????l?b?&??,?&??ξ????????????????W???!jxw΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb??v+)????l?b?&??,?&?????u????ޮ?????G???h
Laurentiu Palcu Oct. 14, 2019, 8:03 a.m. UTC | #2
Hi Rob,

On Fri, Oct 11, 2019 at 09:50:42AM -0500, Rob Herring wrote:
> :u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????#????ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.?\?oۊwb? ?v+)????l?b?&??,?&??ξ????????????????W???!jxw΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb? ?v+)????l?b?&??,?&?????u????ޮ?????G???h

Ok! Not sure how to address this though... :)

Thanks,
laurentiu
Rob Herring (Arm) Oct. 14, 2019, 1:23 p.m. UTC | #3
On Mon, Oct 14, 2019 at 3:03 AM Laurentiu Palcu <laurentiu.palcu@nxp.com> wrote:
>
> Hi Rob,
>
> On Fri, Oct 11, 2019 at 09:50:42AM -0500, Rob Herring wrote:
> > :u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????# ?? ??ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.? \?oۊwb? ?v+)????l ? b? &??,?&??ξ????????????????W???!jx w΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb? ?v+)????l ? b? &??,?&?? ??? u????ޮ???? ?G???h
>
> Ok! Not sure how to address this though... :)

Your mail was base64 which ideally should be avoided on maillists. My
scripting tries to deal with it, but failed obviously. What I said
was:

Reviewed-by: Rob Herring <robh@kernel.org>
Laurentiu Palcu Oct. 15, 2019, 5:50 a.m. UTC | #4
Hi Rob,

On Mon, Oct 14, 2019 at 08:23:51AM -0500, Rob Herring wrote:
> On Mon, Oct 14, 2019 at 3:03 AM Laurentiu Palcu <laurentiu.palcu@nxp.com> wrote:
> >
> > Hi Rob,
> >
> > On Fri, Oct 11, 2019 at 09:50:42AM -0500, Rob Herring wrote:
> > > :u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????# ?? ??ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.? \?oۊwb? ?v+)????l ? b? &??,?&??ξ????????????????W???!jx w΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb? ?v+)????l ? b? &??,?&?? ??? u????ޮ???? ?G???h
> >
> > Ok! Not sure how to address this though... :)
> 
> Your mail was base64 which ideally should be avoided on maillists. My
> scripting tries to deal with it, but failed obviously.

Sorry about that... :/ We've had this issue for a while now and I
thought it got fixed. Our email server being too "smart"...

Thanks,
Laurentiu

> What I said
> was:
> 
> Reviewed-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
new file mode 100644
index 00000000..efd2494
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
@@ -0,0 +1,86 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 NXP
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: iMX8MQ Display Controller Subsystem (DCSS)
+
+maintainers:
+  - Laurentiu Palcu <laurentiu.palcu@nxp.com>
+
+description:
+
+  The DCSS (display controller sub system) is used to source up to three
+  display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
+  2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
+  image processing capabilities are included to provide a solution capable of
+  driving next generation high dynamic range displays.
+
+properties:
+  compatible:
+    const: nxp,imx8mq-dcss
+
+  reg:
+    maxItems: 2
+
+  interrupts:
+    maxItems: 3
+    items:
+      - description: Context loader completion and error interrupt
+      - description: DTG interrupt used to signal context loader trigger time
+      - description: DTG interrupt for Vblank
+
+  interrupt-names:
+    maxItems: 3
+    items:
+      - const: ctx_ld
+      - const: ctxld_kick
+      - const: vblank
+
+  clocks:
+    maxItems: 5
+    items:
+      - description: Display APB clock for all peripheral PIO access interfaces
+      - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL
+      - description: RTRAM clock
+      - description: Pixel clock, can be driver either by HDMI phy clock or MIPI
+      - description: DTRC clock, needed by video decompressor
+
+  clock-names:
+    items:
+      - const: apb
+      - const: axi
+      - const: rtrm
+      - const: pix
+      - const: dtrc
+
+  port@0:
+    type: object
+    description: A port node pointing to a hdmi_in or mipi_in port node.
+
+examples:
+  - |
+    dcss: display-controller@32e00000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "nxp,imx8mq-dcss";
+        reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;
+        interrupts = <6>, <8>, <9>;
+        interrupt-names = "ctx_ld", "ctxld_kick", "vblank";
+        interrupt-parent = <&irqsteer>;
+        clocks = <&clk 248>, <&clk 247>, <&clk 249>,
+                 <&clk 254>,<&clk 122>;
+        clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+        assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>;
+        assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>;
+        assigned-clock-rates = <800000000>,
+                               <400000000>;
+        port@0 {
+            dcss_out: endpoint {
+                remote-endpoint = <&hdmi_in>;
+            };
+        };
+    };
+