From patchwork Tue Nov 27 13:24:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 1003826 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="JxxHfwla"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4344JX5xXcz9s55 for ; Wed, 28 Nov 2018 00:24:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727068AbeK1AWd (ORCPT ); Tue, 27 Nov 2018 19:22:33 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:37318 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726893AbeK1AWd (ORCPT ); Tue, 27 Nov 2018 19:22:33 -0500 Received: by mail-wr1-f67.google.com with SMTP id j10so22681579wru.4 for ; Tue, 27 Nov 2018 05:24:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NJqalrlY6zsQZc0ivwLpnohBDHC3FmMpUejAlCMT5BQ=; b=JxxHfwlatDv8FEstRe7FQepQ36EjICxZakkmP3nsmx/DRqID0+ZY6sSTMcV8X9eYB9 BoDQwWqj9TY8TAshh33a+a2qfEGCoquSc2bQ4HF7yYeUEuALyr9+otItBJgfDU8a//lD asNfPj+7mG3cSxDg7WPJZtwDsDiq030N4b8KE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NJqalrlY6zsQZc0ivwLpnohBDHC3FmMpUejAlCMT5BQ=; b=pLnamFXmnzwu8OWzOsD8bI/s/B8A+QpJcUou+E454FrImDFwFWRph/+FxxghuRKCpf IuiyaxIglDbnx5KbWxChXzEbw9+IEV5MNNTRiRc6VBOHSVBoJNoEMFfM+bFroNXT6U1G 0kjiBSKbUnaQBoGCdnuU1FrIWrvNhSM3j/3ma2ElS/ju46UEN0S6G+dAfX5k5V7QtVmJ sbscu6h/NuHPjRT0JNUJWOJ67eemCLNWxA8Eq67SGayq2WMYx4VAfV2nUVuae/oEj7w4 qkhGAryWeTdSJ5x/enxQ7jiEJ5Bo/I9shhVkQxoHwjt9im+lqAFxz6wjvwFWnmIlQ5p7 qRaA== X-Gm-Message-State: AA+aEWYw1MEICafOMMBcBsRL7NVnL7d2PpuRcrjVgmlyYnyG2uFhRQkS 8iXzBezKUja85cMGDxoCgMDfrQ== X-Google-Smtp-Source: AFSGD/UoTE88iQIWwq0eRKWtSYRG/nZOzppWyfK66RbSLcnNfmzS5jEYgGi7+iG2IJpUb1CNO41iBg== X-Received: by 2002:adf:f211:: with SMTP id p17mr27285751wro.293.1543325076651; Tue, 27 Nov 2018 05:24:36 -0800 (PST) Received: from localhost.localdomain (179.156.136.77.rev.sfr.net. [77.136.156.179]) by smtp.gmail.com with ESMTPSA id 80sm6137635wmv.6.2018.11.27.05.24.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 27 Nov 2018 05:24:36 -0800 (PST) From: Daniel Lezcano To: rjw@rjwysocki.net Cc: linux-kernel@vger.kernel.org, viresh.kumar@linaro.org, Chris Redpath , Quentin Perret , Amit Kucheria , Nicolas Dechesne , Niklas Cassel , Rob Herring , Quentin Perret , Rob Herring , Mark Rutland , Greg Kroah-Hartman , "Rafael J. Wysocki" , Li Yang , Olof Johansson , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH V5 2/2] base/drivers/arch_topology: Default dmips-mhz if they are not set in DT Date: Tue, 27 Nov 2018 14:24:15 +0100 Message-Id: <1543325060-1599-2-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1543325060-1599-1-git-send-email-daniel.lezcano@linaro.org> References: <1543325060-1599-1-git-send-email-daniel.lezcano@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In the case of asymmetric SoC with the same micro-architecture, we have a group of CPUs with smaller OPPs than the other group. One example is the 96boards dragonboard 820c. There is no dmips/MHz difference between both groups, so no need to specify the values in the DT. Unfortunately, without these defined, there is no scaling capacity computation triggered, so we need to write 'capacity-dmips-mhz' for each CPU with the same value in order to force the scaled capacity computation. In order to fix this situation, allocate 'raw_capacity' so the pointer is set and the init_cpu_capacity_callback() function can be called. This was tested on db820c: - specified values in the DT (correct results) - partial values defined in the DT (error + fallback to defaults) - no specified values in the DT (correct results) correct results are: cat /sys/devices/system/cpu/cpu*/cpu_capacity 758 758 1024 1024 ... respectively for CPU0, CPU1, CPU2 and CPU3. That reflects the capacity for the max frequencies 1593600 and 2150400. Cc: Chris Redpath Cc: Quentin Perret Cc: Viresh Kumar Cc: Amit Kucheria Cc: Nicolas Dechesne Cc: Niklas Cassel Reviewed-by: Viresh Kumar Tested-by: Quentin Perret Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/arm/cpu-capacity.txt | 6 ++++++ drivers/base/arch_topology.c | 9 ++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/cpu-capacity.txt b/Documentation/devicetree/bindings/arm/cpu-capacity.txt index 84262cd..f53a3c9 100644 --- a/Documentation/devicetree/bindings/arm/cpu-capacity.txt +++ b/Documentation/devicetree/bindings/arm/cpu-capacity.txt @@ -54,6 +54,12 @@ fall back to the default capacity value for every CPU. If cpufreq is not available, final capacities are calculated by directly using capacity-dmips- mhz values (normalized w.r.t. the highest value found while parsing the DT). +If capacity-dmips-mhz is not specified or if the parsing fails, the +default capacity value will be computed against the highest frequency. +When all CPUs have the same OPP, they will have the same capacity +value otherwise the capacity will be scaled down for CPUs having lower +frequencies. + =========================================== 4 - Examples =========================================== diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index fd5325b..696cea5 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -243,9 +243,16 @@ static int __init register_cpufreq_notifier(void) * until we have the necessary code to parse the cpu capacity, so * skip registering cpufreq notifier. */ - if (!acpi_disabled || !raw_capacity) + if (!acpi_disabled) return -EINVAL; + if (!raw_capacity) { + raw_capacity = kmalloc_array(num_possible_cpus(), + sizeof(*raw_capacity), GFP_KERNEL); + if (!raw_capacity) + return -ENOMEM; + } + if (!alloc_cpumask_var(&cpus_to_visit, GFP_KERNEL)) { pr_err("cpu_capacity: failed to allocate memory for cpus_to_visit\n"); return -ENOMEM;