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[217.6.246.34]) by smtp.googlemail.com with ESMTPSA id z81sm330290lff.80.2017.12.13.06.01.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 Dec 2017 06:01:00 -0800 (PST) Message-ID: <1513173656.2322.16.camel@googlemail.com> Subject: [PATCH] drm/panel: Add support for AUO G104SN02 V2 panel From: Christoph Fritz Reply-To: chf.fritz@googlemail.com To: Thierry Reding , David Airlie , Rob Herring , Mark Rutland Cc: Stefan =?iso-8859-1?q?Riedm=FCller?= , dri-devel@lists.freedesktop.org, "devicetree@vger.kernel.org" Date: Wed, 13 Dec 2017 15:00:56 +0100 X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds support for AUO G104SN02 V2 800x600 10.4" panel to DRM simple panel driver. Signed-off-by: Christoph Fritz Signed-off-by: Stefan Riedmueller --- .../bindings/display/panel/auo,g104sn02.txt | 7 ++++++ drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt diff --git a/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt b/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt new file mode 100644 index 0000000..050ac90 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt @@ -0,0 +1,7 @@ +AU Optronics Corporation 10.4" (800x600) color TFT LCD panel + +Required properties: +- compatible: should be "auo,g104sn02" + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 234af81..f4cc876 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -582,6 +582,29 @@ static const struct panel_desc auo_b133htn01 = { }, }; +static const struct drm_display_mode auo_g104sn02_mode = { + .clock = 40000, + .hdisplay = 800, + .hsync_start = 800 + 40, + .hsync_end = 800 + 40 + 216, + .htotal = 800 + 40 + 216 + 128, + .vdisplay = 600, + .vsync_start = 600 + 10, + .vsync_end = 600 + 10 + 35, + .vtotal = 600 + 10 + 35 + 2, + .vrefresh = 60, +}; + +static const struct panel_desc auo_g104sn02 = { + .modes = &auo_g104sn02_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 211, + .height = 158, + }, +}; + static const struct display_timing auo_g133han01_timings = { .pixelclock = { 134000000, 141200000, 149000000 }, .hactive = { 1920, 1920, 1920 }, @@ -1965,6 +1988,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "auo,b133xtn01", .data = &auo_b133xtn01, }, { + .compatible = "auo,g104sn02", + .data = &auo_g104sn02, + }, { .compatible = "auo,g133han01", .data = &auo_g133han01, }, {