From patchwork Sat Dec 9 08:45:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2h1bmZlbmcgWXVuICjkupHmmKXls7Ap?= X-Patchwork-Id: 846532 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yv2sQ512Bz9sxR for ; Sat, 9 Dec 2017 19:47:22 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751020AbdLIIrQ (ORCPT ); Sat, 9 Dec 2017 03:47:16 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:46471 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751242AbdLIIrC (ORCPT ); Sat, 9 Dec 2017 03:47:02 -0500 X-UUID: f1e0b3bb44b149daa490d529c53a0783-20171209 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 646090273; Sat, 09 Dec 2017 16:46:59 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Sat, 9 Dec 2017 16:46:58 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Sat, 9 Dec 2017 16:46:57 +0800 From: Chunfeng Yun To: Rob Herring , Felipe Balbi , Matthias Brugger , Mathias Nyman CC: Mark Rutland , Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Chunfeng Yun , Jean Delvare , Sean Wang , , , , , Subject: [PATCH 6/7] dt-bindings: usb: mtu3: add USB wakeup properties Date: Sat, 9 Dec 2017 16:45:35 +0800 Message-ID: <1512809136-2779-7-git-send-email-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com> References: <1512809136-2779-1-git-send-email-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Modify the properties of usb wakeup, and use the new way of mtu_wakeup which is extracted from SSUSB controller dirver as a new driver. Signed-off-by: Chunfeng Yun --- Documentation/devicetree/bindings/usb/mediatek,mtu3.txt | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt index b2271d8..2ed546d 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.txt @@ -42,9 +42,17 @@ Optional properties: - enable-manual-drd : supports manual dual-role switch via debugfs; usually used when receptacle is TYPE-A and also wants to support dual-role mode. - - mediatek,enable-wakeup : supports ip sleep wakeup used by host mode - - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup - control register, it depends on "mediatek,enable-wakeup". + - mediatek,uwks : a phandle to USB-Wakeup node to control the type of wakeup, + it's used to replace the old way which is realized by the property of + "mediatek,wakeup-wakeup" and "mediatek,syscon-wakeup", + see: Documentation/devicetree/bindings/soc/mediatek/usb-wakeup.txt + - wakeup-source : Decides if the new way of USB wakeup is supported or + not, it depends on "mediatek,uwks" property. + - mediatek,enable-wakeup : (deprecated) supports ip sleep wakeup used by + host mode, only supports mt8173 platform, use the property of + "mediatek,uwks" instead on other SoCs. + - mediatek,syscon-wakeup : (deprecated) phandle to syscon used to access + USB wakeup control register, it depends on "mediatek,enable-wakeup". - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0, bit1 for u3port1, ... etc;