From patchwork Sat May 20 07:24:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Thang Q. Nguyen" X-Patchwork-Id: 764944 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wVGfr64CXz9sN1 for ; Sat, 20 May 2017 17:25:40 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=apm.com header.i=@apm.com header.b="e8s1hmNo"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751034AbdETHZN (ORCPT ); Sat, 20 May 2017 03:25:13 -0400 Received: from mail-pg0-f49.google.com ([74.125.83.49]:36713 "EHLO mail-pg0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751472AbdETHZM (ORCPT ); Sat, 20 May 2017 03:25:12 -0400 Received: by mail-pg0-f49.google.com with SMTP id x64so47377912pgd.3 for ; Sat, 20 May 2017 00:25:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=from:to:cc:subject:date:message-id; bh=euWa1qu1ZO1QCmMwhALBVB271RWNdlfGqkjDiyqw9vw=; b=e8s1hmNoACdyC9Stvk3l3NFFbt0VyXMp2/3DhvibUHHvjVId9DRCD0NfVaUl8R3rBw BjR979UBolAFJrDkWcbWZxJ7GuCoyGUvtzZk48Va/wdtjSXP0dKnvAzjhZnqnDuLYQLd Ny7qbzVerO0YLgI+WkGiLNObYvv2fci4QMTCE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=euWa1qu1ZO1QCmMwhALBVB271RWNdlfGqkjDiyqw9vw=; b=uFDG2gqQWdBq2/SfDgd0FrhDpD970tWi6siQD4QyyEsH81C7GksqM7ueRHzJOrUuk6 D1PR9XZGOmLT59QWcp3LqiiZa1WDKhGJJlsWn8RrTn8/UdsbMq12g52Q6lWwy4J/S1ei vZbKBeXyHpyipx0WsZWVED1/PO7IEk+4obMucapxdfAYspfqmzxOvtTrz7F4FKEMsUEt aFFpgKSHnFCwzpZRkSe+w2i2RrUTZ7LitiM+QOjp6/lDKx4VcDsnyCoQOmdHaaMtjvdG 7vNP1YmXUJucdOMt9JtdItQkEmwLXhX6HP3BLQjZIYYjbcvlGv2zzoG7v49QABNJUs2j rbrw== X-Gm-Message-State: AODbwcCYJ1962CqOKNCSHK8NmFXeGx0axgDVyli0aopk89yJW4/+nRMg qpRjbofsGvR+5jw3 X-Received: by 10.98.139.206 with SMTP id e75mr14352119pfl.64.1495265111044; Sat, 20 May 2017 00:25:11 -0700 (PDT) Received: from localhost.localdomain ([118.69.219.197]) by smtp.gmail.com with ESMTPSA id d75sm9590664pfj.75.2017.05.20.00.25.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 20 May 2017 00:25:09 -0700 (PDT) From: "Thang Q. Nguyen" To: Greg Kroah-Hartman , Felipe Balbi , Rob Herring , Mark Rutland , Mathias Nyman , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Thang Nguyen , Phong Vo , Loc Ho , Duc Tran , Quang Han , Tung Nguyen , patches@apm.com Subject: [v2 1/1] usb:host:xhci support option to disable xHCI 1.0 USB2 HW LPM Date: Sat, 20 May 2017 14:24:56 +0700 Message-Id: <1495265096-14851-1-git-send-email-tqnguyen@apm.com> X-Mailer: git-send-email 1.7.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org XHCI specification 1.1 does not require xHCI 1.0 compliant controllers to always enable hardware USB2 LPM. However, the current xHCI driver always enable it by setting HLE=1 when seeing HLC=1. This makes certain xHCI controllers that have broken USB2 HW LPM fail to work as there is no way to disable this feature. This patch adds support to control disabling USB2 Hardware LPM via DT/ACPI attribute. Signed-off-by: Tung Nguyen Signed-off-by: Thang Q. Nguyen Acked-by: Rob Herring --- Changes since v1: - Update DT/ACPI attribute and corresponding codes from HLE to LPM to be consistent with other attribute names. --- Documentation/devicetree/bindings/usb/usb-xhci.txt | 1 + drivers/usb/host/xhci-plat.c | 3 +++ drivers/usb/host/xhci.c | 7 ++++++- drivers/usb/host/xhci.h | 1 + 4 files changed, 11 insertions(+), 1 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt index 2d80b60..96f1ac0 100644 --- a/Documentation/devicetree/bindings/usb/usb-xhci.txt +++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt @@ -26,6 +26,7 @@ Required properties: Optional properties: - clocks: reference to a clock + - usb2-lpm-disable: disable USB2 LPM for hardware does not support it - usb3-lpm-capable: determines if platform is USB3 LPM capable - quirk-broken-port-ped: set if the controller has broken port disable mechanism diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 7c2a9e7..950eaf0 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -267,6 +267,9 @@ static int xhci_plat_probe(struct platform_device *pdev) goto disable_clk; } + if (device_property_read_bool(&pdev->dev, "usb2-lpm-disable")) + xhci->quirks |= XHCI_USB2_LPM_DISABLE; + if (device_property_read_bool(sysdev, "usb3-lpm-capable")) xhci->quirks |= XHCI_LPM_SUPPORT; diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 2d13102..47d51d4 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -4055,6 +4055,7 @@ static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd, unsigned long flags; int hird, exit_latency; int ret; + int usb2_lpm_disable = 0; if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || !udev->lpm_capable) @@ -4079,7 +4080,11 @@ static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd, xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n", enable ? "enable" : "disable", port_num + 1); - if (enable) { + /* Check for optional disable USB2 LPM if XHCI 1.0 */ + if ((xhci->quirks & XHCI_USB2_LPM_DISABLE) && (xhci->hci_version == 0x100)) + usb2_lpm_disable = 1; + + if (enable && !usb2_lpm_disable) { /* Host supports BESL timeout instead of HIRD */ if (udev->usb2_hw_lpm_besl_capable) { /* if device doesn't have a preferred BESL value use a diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 73a28a9..cfb9f5d 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1819,6 +1819,7 @@ struct xhci_hcd { /* For controller with a broken Port Disable implementation */ #define XHCI_BROKEN_PORT_PED (1 << 25) #define XHCI_LIMIT_ENDPOINT_INTERVAL_7 (1 << 26) +#define XHCI_USB2_LPM_DISABLE (1 << 27) unsigned int num_active_eps; unsigned int limit_active_eps;