From patchwork Sun Apr 23 15:20:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Pisati X-Patchwork-Id: 753929 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3w9tTk6Qkqz9s03 for ; Mon, 24 Apr 2017 01:20:58 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="B/DMVRFh"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1045752AbdDWPUv (ORCPT ); Sun, 23 Apr 2017 11:20:51 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:34403 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1045745AbdDWPUt (ORCPT ); Sun, 23 Apr 2017 11:20:49 -0400 Received: by mail-wm0-f68.google.com with SMTP id z129so12876525wmb.1; Sun, 23 Apr 2017 08:20:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=52pKmPTuEq8CWDkAo00a9C5yz+kE0FBKvFZtJxJaYao=; b=B/DMVRFhE+pjtyT5YkKc6/tvzzeM2T2W3tVZx0K8nkcnn/Man5uEmxLogYrkUIq9Ye cOHMicfDxi5hH5okctmukfr+4Q8tHO6V6oXtSS3MOpefvJOqOcb1FBo/FrTQo2Q8JE1Z YsITXuLWTptgK/oxleRtejW0X9LRSl1hSrDMH3VRpupxCFU4I3gGmgjLIiZpUB/ooY7d /W0cObTS0zibmiDFeBcuICi9FD5lKRtG1d0mz8hl9FNOPqLSz911Is1bZ3hOqZJEqprh B5pCKcTvYz+tlh5hNiHJrgEZfQAcLXeNG/sSk64qwQjBkMZGWPkX2LklCZX1sMGkwjEu qPPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=52pKmPTuEq8CWDkAo00a9C5yz+kE0FBKvFZtJxJaYao=; b=YndQTEY4/LNZV+uFmZeRg+XWBvYmGIxBJGz4TiY+lE91Gz6Y+rqxU0puJdwy9Cv7Kv Sl6T1dgzf4exKnV94G1unIIBwWpKaEqQ/cItgN1Ppi4g5ZpzyClTASfQeSuL18hsP+/y U27f1HfOvu0k/cezcpjfRO7fRGEAuDKamLQZMbUtH+htjW8R0VgiJ4MgKePoNx8cULfI lhgn3FpGE0wVvuXSKmYZTOh+oiLHoZgR5AsPeUOEWoFgSd2w1nXCF300krNEVzjVa3hp 45jTJnjKqsRRbTtZJ4jgCxd7KjHNSuN0gnrDpbQ8Xr2PUsVPQejROX3yhCXrYZKD7GY5 t8Ew== X-Gm-Message-State: AN3rC/5oqyBzEHwLaA+xoqECzXebiJmWvXAhV+nLVqW2OV7iHYnXkGya 4q4eTOYYNELDtor+B1ma7g== X-Received: by 10.28.35.207 with SMTP id j198mr6422095wmj.17.1492960847319; Sun, 23 Apr 2017 08:20:47 -0700 (PDT) Received: from gmail.com (2-235-152-247.ip228.fastwebnet.it. [2.235.152.247]) by smtp.gmail.com with ESMTPSA id y60sm12881919wrb.39.2017.04.23.08.20.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 23 Apr 2017 08:20:46 -0700 (PDT) From: Paolo Pisati To: Rob Herring , Mark Rutland , Alan Tull , Moritz Fischer Cc: devicetree@vger.kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description Date: Sun, 23 Apr 2017 17:20:44 +0200 Message-Id: <1492960845-342-2-git-send-email-p.pisati@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492960845-342-1-git-send-email-p.pisati@gmail.com> References: <1492960845-342-1-git-send-email-p.pisati@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dt binding documentation details for Lattice MachXO2 FPGA configuration over Slave SPI interface. Signed-off-by: Paolo Pisati Acked-by: Rob Herring --- .../bindings/fpga/lattice-machxo2-spi.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt new file mode 100644 index 0000000..c3ef26bd --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt @@ -0,0 +1,29 @@ +Lattice MachXO2 Slave SPI FPGA Manager + +Lattice MachXO2 FPGAs support a method of loading the bitstream over +'slave SPI' interface. + +See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com + +Required properties: +- compatible: should contain "lattice,machxo2-slave-spi" +- reg: spi chip select of the FPGA + +Example for full FPGA configuration: + + fpga-region0 { + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr_spi>; + #address-cells = <0x1>; + #size-cells = <0x1>; + }; + + spi1: spi@2000 { + ... + + fpga_mgr_spi: fpga-mgr@0 { + compatible = "lattice,machxo2-slave-spi"; + spi-max-frequency = <60000000>; + reg = <0>; + }; + };