From patchwork Wed Feb 15 21:10:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: matthew.gerlach@linux.intel.com X-Patchwork-Id: 728387 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vNsQp1vnFz9s03 for ; Thu, 16 Feb 2017 08:11:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751454AbdBOVLN (ORCPT ); Wed, 15 Feb 2017 16:11:13 -0500 Received: from mga11.intel.com ([192.55.52.93]:61642 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752061AbdBOVKo (ORCPT ); Wed, 15 Feb 2017 16:10:44 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Feb 2017 13:10:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.35,166,1484035200"; d="scan'208"; a="1127262935" Received: from mgerlach-mobl.amr.corp.intel.com (HELO mgerlach-VirtualBox.amr.corp.intel.com) ([10.254.187.172]) by fmsmga002.fm.intel.com with ESMTP; 15 Feb 2017 13:10:42 -0800 From: matthew.gerlach@linux.intel.com To: atull@opensource.altera.com, moritz.fischer@ettus.com, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: Matthew Gerlach Subject: [PATCH 3/4] fpga dt: bindings for Altera Partial Reconfiguraion IP. Date: Wed, 15 Feb 2017 13:10:37 -0800 Message-Id: <1487193038-3490-4-git-send-email-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487193038-3490-1-git-send-email-matthew.gerlach@linux.intel.com> References: <1487193038-3490-1-git-send-email-matthew.gerlach@linux.intel.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Matthew Gerlach Device Tree bindings for Altera Partial Reconfiguraion IP? Signed-off-by: Matthew Gerlach Acked-By: Moritz Fischer --- Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt new file mode 100644 index 0000000..ada821f --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt @@ -0,0 +1,12 @@ +Altera Partial Reconfiguration IP + +Required properties: +- compatible : should contain "altr,pr-ip" +- reg : base address and size for memory mapped io. + +Example: + + fpga_mgr: fpga-mgr@ff20c000 { + compatible = "altr,pr-ip"; + reg = <0xff20c000 0x10>; + };