From patchwork Wed May 4 14:35:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 618479 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3r0LFG2lhbz9t3v for ; Thu, 5 May 2016 00:36:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754019AbcEDOfy (ORCPT ); Wed, 4 May 2016 10:35:54 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:43395 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754004AbcEDOft (ORCPT ); Wed, 4 May 2016 10:35:49 -0400 Received: from ayla.of.borg ([84.195.107.21]) by michel.telenet-ops.be with bizsmtp id qEbm1s00n0TjorY06EbmgN; Wed, 04 May 2016 16:35:48 +0200 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1axxty-0002iP-QX; Wed, 04 May 2016 16:35:46 +0200 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1axxtz-0008IC-70; Wed, 04 May 2016 16:35:47 +0200 From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd Cc: Simon Horman , Magnus Damm , Laurent Pinchart , linux-clk@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 1/4] clk: renesas: cpg-mssr: Document r8a7796 support Date: Wed, 4 May 2016 16:35:40 +0200 Message-Id: <1462372543-31835-2-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462372543-31835-1-git-send-email-geert+renesas@glider.be> References: <1462372543-31835-1-git-send-email-geert+renesas@glider.be> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Geert Uytterhoeven Acked-by: Rob Herring --- Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt index fefb8023020f1a54..394d725ac7e0baa3 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt @@ -13,7 +13,8 @@ They provide the following functionalities: Required Properties: - compatible: Must be one of: - - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC + - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3) + - "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W) - reg: Base address and length of the memory resource used by the CPG/MSSR block @@ -21,8 +22,8 @@ Required Properties: - clocks: References to external parent clocks, one entry for each entry in clock-names - clock-names: List of external parent clock names. Valid names are: - - "extal" (r8a7795) - - "extalr" (r8a7795) + - "extal" (r8a7795, r8a7796) + - "extalr" (r8a7795, r8a7796) - #clock-cells: Must be 2 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"